Jochen A. G. Jess

According to our database, Jochen A. G. Jess authored at least 52 papers between 1982 and 2006.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2006

Statistical Timing for Parametric Yield Prediction of Digital Integrated Circuits.

Jochen A. G. Jess, Kerim Kalafala, Srinath R. Naidu, Ralph H. J. M. Otten, Chandramouli Visweswariah

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

2003

Codeübersetzung unter Zeitvorgaben für eingebettete Signalprozessoren (Performance Controlled Compilation for Embedded Signal Processors).

Jochen A. G. Jess

it Inf. Technol., 2003

2002

Parametric Yield Estimation for Deep Sub- Micron VLSI Circuits.

Jochen A. G. Jess

Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, 2002

2001

Static resource models of instruction sets.

Qin Zhao, Twan Basten, Bart Mesman, C. A. J. van Eijk, Jochen A. G. Jess

Proceedings of the 14th International Symposium on Systems Synthesis, 2001

Phase coupled operation assignment for VLIW processors with distributed register files.

Marco Bekooij, Jochen A. G. Jess, Jef L. van Meerbergen

Proceedings of the 14th International Symposium on Systems Synthesis, 2001

Constraint Satisfaction for Relative Location Assignment and Scheduling.

Carlos A. Alba Pinto, Bart Mesman, Jochen A. G. Jess

Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

Constraint satisfaction for storage files with Fifos or stacks during scheduling.

Carlos A. Alba Pinto, Bart Mesman, Koen van Eijk, Jochen A. G. Jess

Proceedings of the Conference on Design, Automation and Test in Europe, 2001

2000

A code-motion pruning technique for global scheduling.

Luiz C. V. dos Santos, Marc J. M. Heijligers, C. A. J. van Eijk, J. Van Eijnhoven, Jochen A. G. Jess

ACM Trans. Design Autom. Electr. Syst., 2000

Constraint analysis for code generation: basic techniques and applications in FACTS.

Koen van Eijk, Bart Mesman, Carlos A. Alba Pinto, Qin Zhao, Marco Bekooij, Jef L. van Meerbergen, Jochen A. G. Jess

ACM Trans. Design Autom. Electr. Syst., 2000

Designing electronic engines with electronic engines: 40 years ofbootstrapping of a technology upon itself.

Jochen A. G. Jess

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

Prophid: A Platform-Based Design Method.

Jeroen A. J. Leijten, Jef L. van Meerbergen, Adwin H. Timmer, Jochen A. G. Jess

Des. Autom. Embed. Syst., 2000

Register Binding for Predicated Execution in DSP Applications.

Qin Zhao, C. A. J. van Eijk, Carlos A. Alba Pinto, Jochen A. G. Jess

Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000

Address Satisfaction for Storage Files with Fifos or Stacks during Scheduling of DSP Algorithms.

Carlos A. Alba Pinto, Koen van Eijk, Bart Mesman, Jochen A. G. Jess

Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000

1999

Constraint analysis for DSP code generation.

Bart Mesman, Adwin H. Timmer, Jef L. van Meerbergen, Jochen A. G. Jess

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

Exploiting State Equivalence on the Fly while Applying Code Motion and Speculation.

Luiz C. V. dos Santos, Jochen A. G. Jess

Proceedings of the 1999 Design, 1999

A Reordering Technique for Efficient Code Motion.

Luiz C. V. dos Santos, Jochen A. G. Jess

Proceedings of the 36th Conference on Design Automation, 1999

1998

A Constraint Driven Approach to Loop Pipelining and Register Binding.

Bart Mesman, Marino T. J. Strik, Adwin H. Timmer, Jef L. van Meerbergen, Jochen A. G. Jess

Proceedings of the 1998 Design, 1998

Stream Communication between Real-Time Tasks in a High-Performance Multiprocessor.

Jeroen A. J. Leijten, Jef L. van Meerbergen, Adwin H. Timmer, Jochen A. G. Jess

Proceedings of the 1998 Design, 1998

1997

Constraint Analysis for DSP Code Generation.

Bart Mesman, Marino T. J. Strik, Adwin H. Timmer, Jef L. van Meerbergen, Jochen A. G. Jess

Proceedings of the 10th International Symposium on System Synthesis, 1997

PROPHID: A Heterogeneous Multi-Processor Architecture for Multimedia.

Jeroen A. J. Leijten, Jef L. van Meerbergen, Adwin H. Timmer, Jochen A. G. Jess

Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

PROPHID: a data-driven multi-processor architecture for high-performance DSP.

Jeroen A. J. Leijten, Jef L. van Meerbergen, Adwin H. Timmer, Jochen A. G. Jess

Proceedings of the European Design and Test Conference, 1997

1996

An efficient CMOS bridging fault simulator: with SPICE accuracy.

Chennian Di, Jochen A. G. Jess

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996

Computing the entire active area/power consumption versus delay tradeoff curve for gate sizing with a piecewise linear simulator.

Michel R. C. M. Berkelaar, Pim H. W. Buurman, Jochen A. G. Jess

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996

A Constructive Method for Exploiting Code Motion.

Luiz C. V. dos Santos, Marc J. M. Heijligers, C. A. J. van Eijk, Jos T. J. van Eijndhoven, Jochen A. G. Jess

Proceedings of the 9th International Symposium on System Synthesis, 1996

Exploiting Functional Dependencies in Finite State Machine Verification.

C. A. J. van Eijk, Jochen A. G. Jess

Proceedings of the 1996 European Design and Test Conference, 1996

1995

Exact scheduling strategies based on bipartite graph matching.

Adwin H. Timmer, Jochen A. G. Jess

Proceedings of the 1995 European Design and Test Conference, 1995

Efficient code generation for in-house DSP-cores.

Marino T. J. Strik, Jef L. van Meerbergen, Adwin H. Timmer, Jochen A. G. Jess, Stefaan Note

Proceedings of the 1995 European Design and Test Conference, 1995

Analysis and reduction of glitches in synchronous networks.

Jeroen A. J. Leijten, Jef L. van Meerbergen, Jochen A. G. Jess

Proceedings of the 1995 European Design and Test Conference, 1995

Run-time consistency checking in discrete simulation models.

J. W. G. Fleurkens, C. A. J. van Eijk, Jochen A. G. Jess

Proceedings of the 1995 European Design and Test Conference, 1995

Conflict Modelling and Instruction Scheduling in Code Generation for In-House DSP Cores.

Adwin H. Timmer, Marino T. J. Strik, Jef L. van Meerbergen, Jochen A. G. Jess

Proceedings of the 32st Conference on Design Automation, 1995

High-level synthesis scheduling and allocation using genetic algorithms.

Marc J. M. Heijligers, L. J. M. Cluitmans, Jochen A. G. Jess

Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29, 1995

1994

NEAT: An Object Oriented High-Level Synthesis Interface.

M. J. M. Heijiligers, H. A. Hilderink, Adwin H. Timmer, Jochen A. G. Jess

Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

Computing the entire active area/power consumption versus delay trade-off curve for gate sizing with a piecewise linear simulator.

Michel R. C. M. Berkelaar, Pim H. W. Buurman, Jochen A. G. Jess

Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

Probability Analysis for CMOS Floating Gate Faults.

Hua Xue, Chennian Di, Jochen A. G. Jess

Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994

On Design Rule Correct Maze Routing.

Ed P. Huijbregts, Jos T. J. van Eijndhoven, Jochen A. G. Jess

Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994

Routing for Manufacturability.

Hua Xue, Ed P. Huijbregts, Jochen A. G. Jess

Proceedings of the 31st Conference on Design Automation, 1994

1993

General gate array routing using a k-terminal net routing algorithm with failure prediction.

Ed P. Huijbregts, Jochen A. G. Jess

IEEE Trans. Very Large Scale Integr. Syst., 1993

On CMOS bridge fault modeling and test pattern evaluation.

Chennian Di, Jochen A. G. Jess

Proceedings of the 11th IEEE VLSI Test Symposium (VTS'93), 1993

A Multiple Terminal Net Routing Algorithm Using Failure Prediction.

Ed P. Huijbregts, Jochen A. G. Jess

Proceedings of the Sixth International Conference on VLSI Design, 1993

Parameter Monitoring: Advantages and Pitfalls.

M. M. A. van Rosmalen, Keith Baker, Eric Bruls, Jochen A. G. Jess

Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

On Accurate Modeling and Efficient Simulation of CMOS Opens.

Chennian Di, Jochen A. G. Jess

Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

A net-oriented method for realistic fault analysis.

Hua Xue, Chennian Di, Jochen A. G. Jess

Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

Execution interval analysis under resource constraints.

Adwin H. Timmer, Jochen A. G. Jess

Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

Fast Multi-Layer Critical Area Computation.

Hua Xue, Chennian Di, Jochen A. G. Jess

Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, 1993

1992

Foreground memory management in data path synthesis.

Leon Stok, Jochen A. G. Jess

Int. J. Circuit Theory Appl., 1992

1991

A Generic Method to Develop a Defect Monitoring System for IC Processes.

Eric Bruls, F. Camerik, H. J. Kretschman, Jochen A. G. Jess

Proceedings of the Proceedings IEEE International Test Conference 1991, 1991

1990

Gate sizing in MOS digital circuits with linear programming.

Michel R. C. M. Berkelaar, Jochen A. G. Jess

Proceedings of the European Design Automation Conference, 1990

1989

On the design and implementation of a wafer yield editor.

José Pineda de Gyvez, Jochen A. G. Jess

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989

Qualification and Quantification of Process-Induced Product-Related Defects.

F. Camerik, P. A. J. Dirks, Jochen A. G. Jess

Proceedings of the Proceedings International Test Conference 1989, 1989

A layout defect-sensitivity extractor.

José Pineda de Gyvez, Jochen A. G. Jess

Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989

1988

Technology mapping for standard-cell generators.

Michel R. C. M. Berkelaar, Jochen A. G. Jess

Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988

1982

A Data Structure for Parallel <i>L/U</i> Decomposition.

Jochen A. G. Jess, H. G. M. Kees

IEEE Trans. Computers, 1982