Louis K. Scheffer

According to our database1, Louis K. Scheffer authored at least 33 papers between 1985 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.



In proceedings 
PhD thesis 



On csauthors.net:


Insights from Biology: Low Power Circuits in the Fruit Fly.
Proceedings of the International Symposium on Low Power Electronics and Design, 2018

Drosophila Connectome.
Proceedings of the Encyclopedia of Computational Neuroscience, 2014

Small Sample Learning of Superpixel Classifiers for EM Segmentation.
Proceedings of the Medical Image Computing and Computer-Assisted Intervention - MICCAI 2014, 2014

Lessons from the neurons themselves.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

Electron Microscopy Reconstruction of Brain Structure Using Sparse Representations Over Learned Dictionaries.
IEEE Trans. Med. Imaging, 2013

Keynote talk: Deciphering the brain, cousin to the chip.
Proceedings of the 26th International Conference on VLSI Design and 12th International Conference on Embedded Systems, 2013

Design tools for artificial nervous systems.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

High Resolution Segmentation of Neuronal Tissues from Low Depth-Resolution EM Imagery.
Proceedings of the Energy Minimazation Methods in Computer Vision and Pattern Recognition, 2011

SLIP: 10 years ago and 10 years from now.
Proceedings of the International Workshop on System Level Interconnect Prediction Workshop, 2010

Physical design of biological systems.
Proceedings of the 2010 International Symposium on Physical Design, 2010

Increasing depth resolution of electron microscopy of neural circuits using sparse tomographic reconstruction.
Proceedings of the Twenty-Third IEEE Conference on Computer Vision and Pattern Recognition, 2010

Industrial Floorplanning and Prototyping.
Proceedings of the Handbook of Algorithms for Physical Design Automation., 2008

Statistical Timing Analysis: From Basic Principles to State of the Art.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2008

Special issue on System-Level Interconnect Prediction.
Integration, 2007

Rules vs tools: what's the right way to address IC manufacturing complexity?
Proceedings of the 2007 International Symposium on Physical Design, 2007

A DFM aware, space based router.
Proceedings of the 2007 International Symposium on Physical Design, 2007

CAD Implications of New Interconnect Technologies.
Proceedings of the 44th Design Automation Conference, 2007

An overview of on-chip interconnect variation.
Proceedings of the Eigth International Workshop on System-Level Interconnect Prediction (SLIP 2006), 2006

The great interconnect buffering debate: are you a chicken or an ostrich?
Proceedings of the 2004 International Symposium on Physical Design, 2004

Is statistical timing statistically significant?
Proceedings of the 41th Design Automation Conference, 2004

Physical CAD changes to incorporate design for lithography and manufacturability.
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

Some conditions under which hierarchical verification is O(N).
IEEE Trans. on CAD of Integrated Circuits and Systems, 2003

Signal Integrity and Power Supply Network Analysis of Deep SubMicron Chips.
Proceedings of the Integrated Circuit and System Design, 2003

Nanometer design: place your bets.
Proceedings of the 40th Design Automation Conference, 2003

Explicit computation of performance as a function of process variation.
Proceedings of the 8th ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, 2002

Methodologies and Tools for Pipelined On-Chip Interconnect.
Proceedings of the 20th International Conference on Computer Design (ICCD 2002), 2002

Timing- and crosstalk-driven area routing.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2001

Panel: Is Nanometer Design Under Control?
Proceedings of the 38th Design Automation Conference, 2001

Why interconnect prediction doesn't work.
Proceedings of the Second IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2000), 2000

Design closure (panel session): hope or hype?
Proceedings of the 37th Conference on Design Automation, 2000

Timing and Crosstalk Driven Area Routing.
Proceedings of the 35th Conference on Design Automation, 1998

A roadmap of CAD tool changes for sub-micron interconnect problems.
Proceedings of the 1997 International Symposium on Physical Design, 1997

Hierarchical analysis of IC artwork with user defined abstraction rules.
Proceedings of the 22nd ACM/IEEE conference on Design automation, 1985