Chaoyang Zheng

Orcid: 0009-0006-2340-9804

According to our database1, Chaoyang Zheng authored at least 6 papers between 2015 and 2024.

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Bibliography

2024
A Low-Power, Compact, 0.1-5.5-GHz, 40-dBm IB OIP3 LNTA-First Receiver for SDR.
IEEE J. Solid State Circuits, September, 2024

Global exponential synchronization of complex networks with reaction diffusions and finite distributed delays coupling.
Neurocomputing, 2024

2023
A 400M-510MHz On-Chip Transformer-Based RF Power Amplifier with 22.5dBm Output Power and 48% PAE.
Proceedings of the 15th IEEE International Conference on ASIC, 2023

2021
Multi-Scale Feedback Feature Refinement U-Net for Medical Image Segmentation.
Proceedings of the 2021 IEEE International Conference on Multimedia and Expo, 2021

2016
SPARC M7: A 20 nm 32-Core 64 MB L3 Cache Processor.
IEEE J. Solid State Circuits, 2016

2015


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