Christoph Gerum

Orcid: 0000-0002-1715-567X

According to our database1, Christoph Gerum authored at least 13 papers between 2015 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Precise Localization Within the GI Tract by Combining Classification of CNNs and Time-Series Analysis of HMMs.
Proceedings of the Machine Learning in Medical Imaging - 14th International Workshop, 2023

Enhancing Robustness of LiDAR-Based Perception in Adverse Weather using Point Cloud Augmentations.
Proceedings of the IEEE Intelligent Vehicles Symposium, 2023

2022
Hardware Accelerator and Neural Network Co-Optimization for Ultra-Low-Power Audio Processing Devices.
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

2021
Dynamic Range and Complexity Optimization of Mixed-Signal Machine Learning Systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Behavior of Keyword Spotting Networks Under Noisy Conditions.
Proceedings of the Artificial Neural Networks and Machine Learning - ICANN 2021, 2021


2020
UltraTrail: A Configurable Ultralow-Power TC-ResNet AI Accelerator for Efficient Keyword Spotting.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

2019
Systematic RISC-V based Firmware Design<sup>⋆</sup>.
Proceedings of the 2019 Forum for Specification and Design Languages, 2019

2018
Advancing source-level timing simulation using loop acceleration.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
Timing Models for Fast Embedded Software Performance Analysis.
Proceedings of the Handbook of Hardware/Software Codesign., 2017

Context-sensitive timing automata for fast source level simulation.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2015
Improving accuracy of source level timing simulation for GPUs using a probabilistic resource model.
Proceedings of the 2015 International Conference on Embedded Computer Systems: Architectures, 2015

Source level performance simulation of GPU cores.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015


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