RLAlloc: A Deep Reinforcement Learning-Assisted Resource Allocation Framework for Enhanced Both I/O Throughput and QoS Performance of Multi-Streamed SSDs.

[BibT_eX]

[DOI]

Mengquan Li

Chao Wu

Congming Gao

Cheng Ji

Kenli Li

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Libra: A Space-Efficient, High-Performance Inline Deduplication for Emerging Hybrid Storage System.

[BibT_eX]

[DOI]

Proceedings of the IEEE Intl Conf on Parallel & Distributed Processing with Applications, 2023

2022

Reprogramming 3D TLC Flash Memory based Solid State Drives.

[BibT_eX]

[DOI]

ACM Trans. Storage, 2022

Stop unnecessary refreshing: extending 3D NAND flash lifetime with ORBER.

[BibT_eX]

[DOI]

CCF Trans. High Perform. Comput., 2022

2021

ParaBit: Processing Parallel Bitwise Operations in NAND Flash Memory based SSDs.

[BibT_eX]

[DOI]

Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

Pattern-Guided File Compression with User-Experience Enhancement for Log-Structured File System on Mobile Devices.

[BibT_eX]

[DOI]

Proceedings of the 19th USENIX Conference on File and Storage Technologies, 2021

2020

Process Variation Aware Read Performance Improvement for LDPC-Based nand Flash Memory.

[BibT_eX]

[DOI]

IEEE Trans. Reliab., 2020

Boosting the Performance of SSDs via Fully Exploiting the Plane Level Parallelism.

[BibT_eX]

[DOI]

IEEE Trans. Parallel Distributed Syst., 2020

Aging Capacitor Supported Cache Management Scheme for Solid-State Drives.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Maximizing I/O Throughput and Minimizing Performance Variation via Reinforcement Learning Based I/O Merging for SSDs.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2020

2019

Minimizing Retention Induced Refresh Through Exploiting Process Variation of Flash Memory.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2019

Optimizing fragmentation and segment cleaning for CPS based storage devices.

[BibT_eX]

[DOI]

Proceedings of the 34th ACM/SIGAPP Symposium on Applied Computing, 2019

Fair Down to the Device: A GC-Aware Fair Scheduler for SSD.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE Non-Volatile Memory Systems and Applications Symposium, 2019

Optimizing Tail Latency of LDPC based Flash Memory Storage Systems Via Smart Refresh.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE International Conference on Networking, 2019

Parallel all the time: Plane Level Parallelism Exploration for High Performance SSDs.

[BibT_eX]

[DOI]

Proceedings of the 35th Symposium on Mass Storage Systems and Technologies, 2019

Constructing Large, Durable and Fast SSD System via Reprogramming 3D TLC Flash Memory.

[BibT_eX]

[DOI]

Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

2018

Exploiting Chip Idleness for Minimizing Garbage Collection - Induced Chip Access Conflict on SSDs.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2018

Exploiting Parallelism for Access Conflict Minimization in Flash-Based Solid State Drives.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Access Characteristic Guided Read and Write Regulation on Flash Based Storage Systems.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2018

F2FS Aware Mapping Cache Design on Solid State Drives.

[BibT_eX]

[DOI]

Proceedings of the IEEE 7th Non-Volatile Memory Systems and Applications Symposium, 2018

An Efficient Cache Management Scheme for Capacitor Equipped Solid State Drives.

[BibT_eX]

[DOI]

Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

Loss is Gain: Shortening Data for Lifetime Improvement on Low-Cost ECC Enabled Consumer-Level Flash Memory.

[BibT_eX]

[DOI]

Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

Revisiting wear leveling design on compression applied 3D NAND flash memory: work-in-progress.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2018

2017

Lightweight Data Compression for Mobile Flash Storage.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2017

Asymmetric Error Rates of Cell States Exploration for Performance Improvement on Flash Memory Based Storage Systems.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

2016

Minimizing cell-to-cell interference by exploiting differential bit impact characteristics of scaled MLC NAND flash memories.

[BibT_eX]

[DOI]

Proceedings of the 5th Non-Volatile Memory Systems and Applications Symposium, 2016

2015

Maximizing IO performance via conflict reduction for flash memory storage systems.

[BibT_eX]

[DOI]

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014

Exploiting parallelism in I/O scheduling for access conflict minimization in flash-based solid state drives.

[BibT_eX]

[DOI]

Proceedings of the IEEE 30th Symposium on Mass Storage Systems and Technologies, 2014

Exploit asymmetric error rates of cell states to improve the performance of flash memory storage systems.

[BibT_eX]

[DOI]

Proceedings of the 32nd IEEE International Conference on Computer Design, 2014

Congming Gao

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