Dan Page

Orcid: 0000-0002-4709-7036

Affiliations:
  • University of Bristol, UK


According to our database1, Dan Page authored at least 98 papers between 1999 and 2024.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2024
eLIMInate: a Leakage-focused ISE for Masked Implementation.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024

2023
Identifying Strategies to Mitigate Cybersickness in Virtual Reality Induced by Flying with an Interactive Travel Interface.
Multimodal Technol. Interact., April, 2023

RISC-V Instruction Set Extensions for Lightweight Symmetric Cryptography.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2023

eLIMInate: a Leakage-focused ISE for Masked Implementation.
IACR Cryptol. ePrint Arch., 2023

2022
MIRACLE: MIcRo-ArChitectural Leakage Evaluation A study of micro-architectural power leakage across many devices.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022

Towards Micro-architectural Leakage Simulators: Reverse Engineering Micro-architectural Leakage Features Is Practical.
Proceedings of the Advances in Cryptology - EUROCRYPT 2022 - 41st Annual International Conference on the Theory and Applications of Cryptographic Techniques, Trondheim, Norway, May 30, 2022

2021
The design of scalar AES Instruction Set Extensions for RISC-V.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021

An Instruction Set Extension to Support Software-Based Masking.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021

XDIVINSA: eXtended DIVersifying INStruction Agent to Mitigate Power Side-Channel Leakage.
IACR Cryptol. ePrint Arch., 2021

MIRACLE: MIcRo-ArChitectural Leakage Evaluation.
IACR Cryptol. ePrint Arch., 2021

A lightweight ISE for ChaCha on RISC-V.
IACR Cryptol. ePrint Arch., 2021

SME: Scalable Masking Extensions.
IACR Cryptol. ePrint Arch., 2021

Reverse Engineering the Micro-Architectural Leakage Features of a Commercial Processor.
IACR Cryptol. ePrint Arch., 2021

Efficient Modular Multiplication.
IACR Cryptol. ePrint Arch., 2021

2020
FENL: an ISE to mitigate analogue micro-architectural leakage.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2020

Share-slicing: Friend or Foe?
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2020

An Instruction Set Extension to Support Software-Based Masking.
IACR Cryptol. ePrint Arch., 2020

Implementing the Draft RISC-V Scalar Cryptography Extensions.
Proceedings of the HASP@MICRO 2020: Hardware and Architectural Support for Security and Privacy, 2020

2018
Preface to TCHES 2018.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2018

Using the Cloud to Determine Key Strengths - Triennial Update.
IACR Cryptol. ePrint Arch., 2018

2017
Turning Online Ciphers Off.
IACR Trans. Symmetric Cryptol., 2017

2015
SoC it to EM: electromagnetic side-channel attacks on a complex system-on-chip.
IACR Cryptol. ePrint Arch., 2015

Rogue Decryption Failures: Reconciling AE Robustness Notions.
IACR Cryptol. ePrint Arch., 2015

Turning Online Ciphers Off.
IACR Cryptol. ePrint Arch., 2015

2014
What Is Computer Science? - An Information Security Perspective
Undergraduate Topics in Computer Science, Springer, ISBN: 978-3-319-04041-7, 2014

Making and Breaking Leakage Simulators.
IACR Cryptol. ePrint Arch., 2014

Digital investigations for IPv6-based Wireless Sensor Networks.
Digit. Investig., 2014

Simulatable Leakage: Analysis, Pitfalls, and New Constructions.
Proceedings of the Advances in Cryptology - ASIACRYPT 2014, 2014

2013
On secure embedded token design (Long Version) - Quasi-looped Yao circuits and bounded leakage.
IACR Cryptol. ePrint Arch., 2013

On the (re)design of an FPGA-based PUF.
IACR Cryptol. ePrint Arch., 2013

Light-weight primitive, feather-weight security? A cryptanalytic knock-out. (Preliminary results).
IACR Cryptol. ePrint Arch., 2013

On Secure Embedded Token Design.
Proceedings of the Information Security Theory and Practice. Security of Mobile and Cyber-Physical Systems, 2013

Light-weight primitive, feather-weight security: a cryptanalytic knock-out.
Proceedings of the Workshop on Embedded Systems Security, 2013

2012
Fault Attacks on Pairing-Based Cryptography.
Proceedings of the Fault Analysis in Cryptography, 2012

An exploration of mechanisms for dynamic cryptographic instruction set extension.
J. Cryptogr. Eng., 2012

Erratum to: Side-channel attacks on the McEliece and Niederreiter public-key cryptosystems.
J. Cryptogr. Eng., 2012

On Reconfigurable Fabrics and Generic Side-Channel Countermeasures.
IACR Cryptol. ePrint Arch., 2012

Efficient Java Implementation of Elliptic Curve Cryptography for J2ME-Enabled Mobile Devices.
Proceedings of the Information Security Theory and Practice. Security, Privacy and Trust in Computing Systems and Ambient Intelligent Ecosystems, 2012

Harnessing Biased Faults in Attacks on ECC-Based Signature Schemes.
Proceedings of the 2012 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2012

Compiler Assisted Masking.
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2012, 2012

2011
Side-channel attacks on the McEliece and Niederreiter public-key cryptosystems.
J. Cryptogr. Eng., 2011

Automatic Insertion of DPA Countermeasures.
IACR Cryptol. ePrint Arch., 2011

Using the Cloud to Determine Key Strengths.
IACR Cryptol. ePrint Arch., 2011

Efficient Java Implementation of Elliptic Curve Cryptography for J2ME-Enabled Mobile Devices.
IACR Cryptol. ePrint Arch., 2011

Practical realisation and elimination of an ECC-related software bug attack.
IACR Cryptol. ePrint Arch., 2011

Can Code Polymorphism Limit Information Leakage?
IACR Cryptol. ePrint Arch., 2011

Type Checking Cryptography Implementations.
Proceedings of the Fundamentals of Software Engineering - 4th IPM International Conference, 2011

A Unified Multiply/Accumulate Unit for Pairing-Based Cryptography over Prime, Binary and Ternary Fields.
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

Bit-Sliced Binary Normal Basis Multiplication.
Proceedings of the 20th IEEE Symposium on Computer Arithmetic, 2011

2010
An Evaluation of Hash Functions on a Power Analysis Resistant Processor Architecture.
IACR Cryptol. ePrint Arch., 2010

Bridging the gap between symbolic and efficient AES implementations.
Proceedings of the 2010 ACM SIGPLAN Workshop on Partial Evaluation and Program Manipulation, 2010

2009
Practical Introduction to Computer Architecture.
Texts in Computer Science, Springer, ISBN: 978-1-84882-256-6, 2009

Implementation Attacks & Countermeasures.
Proceedings of the Identity-Based Cryptography, 2009

Constructive and Destructive Use of Compilers in Elliptic Curve Cryptography.
J. Cryptol., 2009

Side-Channel Analysis of Cryptographic Software via Early-Terminating Multiplications.
IACR Cryptol. ePrint Arch., 2009

On the Design and Implementation of an Efficient DAA Scheme.
IACR Cryptol. ePrint Arch., 2009

Program interpolation.
Proceedings of the 2009 ACM SIGPLAN Symposium on Partial Evaluation and Semantics-based Program Manipulation, 2009

Using Compilers to Enhance Cryptographic Product Development.
Proceedings of the ISSE 2009, 2009

Hardware/Software Co-design of Public-Key Cryptography for SSL Protocol Execution in Embedded Systems.
Proceedings of the Information and Communications Security, 11th International Conference, 2009

Non-deterministic processors: FPGA-based analysis of area, performance and security.
Proceedings of the 4th Workshop on Embedded Systems Security, 2009

2008
Randomised representations.
IET Inf. Secur., 2008

On Software Parallel Implementation of Cryptographic Pairings.
IACR Cryptol. ePrint Arch., 2008

Reassessing the TCG Specifications for Trusted Computing in Mobile and Embedded Systems.
Proceedings of the IEEE International Workshop on Hardware-Oriented Security and Trust, 2008

Light-Weight Instruction Set Extensions for Bit-Sliced Cryptography.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2008

2007
Nondeterministic Multithreading.
IEEE Trans. Computers, 2007

Executing Modular Exponentiation on a Graphics Accelerator.
IACR Cryptol. ePrint Arch., 2007

Compiler Assisted Elliptic Curve Cryptography.
IACR Cryptol. ePrint Arch., 2007

Instruction Set Extensions for Pairing-Based Cryptography.
Proceedings of the Pairing-Based Cryptography, 2007

Toward Acceleration of RSA Using 3D Graphics Hardware.
Proceedings of the Cryptography and Coding, 2007

Cryptographic Side-Channels from Low-Power Cache Memory.
Proceedings of the Cryptography and Coding, 2007

2006
A Fault Attack on Pairing-Based Cryptography.
IEEE Trans. Computers, 2006

On Small Characteristic Algebraic Tori in Pairing-Based Cryptography.
LMS J. Comput. Math., 2006

A Note On Side-Channels Resulting From Dynamic Compilation.
IACR Cryptol. ePrint Arch., 2006

High Security Pairing-Based Cryptography Revisited.
IACR Cryptol. ePrint Arch., 2006

Discrete Logarithm Variants of VSH.
Proceedings of the Progressin Cryptology, 2006

DFM: swimming upstream.
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006

2005
Hardware and Software Normal Basis Arithmetic for Pairing-Based Cryptography in Characteristic Three.
IEEE Trans. Computers, 2005

Partitioned Cache Architecture as a Side-Channel Defence Mechanism.
IACR Cryptol. ePrint Arch., 2005

On the Automatic Construction of Indistinguishable Operations.
IACR Cryptol. ePrint Arch., 2005

First Steps Toward a Cryptography-Aware Language and Compiler.
IACR Cryptol. ePrint Arch., 2005

Hardware Acceleration of the Tate Pairing in Characteristic Three.
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2005, 7th International Workshop, Edinburgh, UK, August 29, 2005

2004
Parallel Cryptographic Arithmetic Using a Redundant Montgomery Representation.
IEEE Trans. Computers, 2004

Fault and Side-Channel Attacks on Pairing Based Cryptography.
IACR Cryptol. ePrint Arch., 2004

A comparison of MNT curves and supersingular curves.
IACR Cryptol. ePrint Arch., 2004

Practical Cryptography in High Dimensional Tori.
IACR Cryptol. ePrint Arch., 2004

On XTR and Side-Channel Analysis.
Proceedings of the Selected Areas in Cryptography, 11th International Workshop, 2004

Attacking DSA Under a Repeated Bits Assumption.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2004

A Comparison of CEILIDH and XTR.
Proceedings of the Algorithmic Number Theory, 6th International Symposium, 2004

Function Field Sieve in Characteristic Three.
Proceedings of the Algorithmic Number Theory, 6th International Symposium, 2004

2003
Defending against cache-based side-channel attacks.
Inf. Secur. Tech. Rep., 2003

Using Media Processors for Low-Memory AES Implementation.
Proceedings of the 14th IEEE International Conference on Application-Specific Systems, 2003

2002
Software Implementation of Finite Fields of Characteristic Three, for Use in Pairing-based Cryptosystems.
LMS J. Comput. Math., 2002

Theoretical Use of Cache Memory as a Cryptanalytic Side-Channel.
IACR Cryptol. ePrint Arch., 2002

Caches with Compositional Performance.
Proceedings of the Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation, 2002

Hardware Implementation of Finite Fields of Characteristic Three.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2002

Instruction Stream Mutation for Non-Deterministic Processors.
Proceedings of the 13th IEEE International Conference on Application-Specific Systems, 2002

Predictable Instruction Caching for Media Processors.
Proceedings of the 13th IEEE International Conference on Application-Specific Systems, 2002

1999
Microcaches.
Proceedings of the High Performance Computing, 1999


  Loading...