Johann Großschädl

According to our database1, Johann Großschädl authored at least 103 papers between 2000 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of two.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2020
Lightweight AEAD and Hashing using the Sparkle Permutation Family.
IACR Trans. Symmetric Cryptol., 2020

Faster Software Implementation of the SIKE Protocol Based on A New Data Representation.
IACR Cryptol. ePrint Arch., 2020

An Instruction Set Extension to Support Software-Based Masking.
IACR Cryptol. ePrint Arch., 2020

Alzette: A 64-Bit ARX-box - (Feat. CRAX and TRAX).
Proceedings of the Advances in Cryptology - CRYPTO 2020, 2020

Parallel Implementation of SM2 Elliptic Curve Cryptography on Intel Processors with AVX2.
Proceedings of the Information Security and Privacy - 25th Australasian Conference, 2020

2019
Triathlon of lightweight block ciphers for the Internet of things.
J. Cryptogr. Eng., 2019

Alzette: A 64-bit ARX-box.
IACR Cryptol. ePrint Arch., 2019

A Lightweight Implementation of NTRU Prime for the Post-quantum Internet of Things.
Proceedings of the Information Security Theory and Practice, 2019

FELICS-AEAD: Benchmarking of Lightweight Authenticated Encryption Algorithms.
Proceedings of the Smart Card Research and Advanced Applications, 2019

2018
Securing Edge Devices in the Post-Quantum Internet of Things Using Lattice-Based Cryptography.
IEEE Commun. Mag., 2018

A Family of Lightweight Twisted Edwards Curves for the Internet of Things.
Proceedings of the Information Security Theory and Practice, 2018

Efficient Implementation of the SHA-512 Hash Function for 8-Bit AVR Microcontrollers.
Proceedings of the Innovative Security Solutions for Information Technology and Communications, 2018

Energy-Scalable Montgomery-Curve ECDH Key Exchange for ARM Cortex-M3 Microcontrollers.
Proceedings of the 6th International Conference on Future Internet of Things and Cloud Workshops, 2018

2017
High-Performance Ideal Lattice-Based Cryptography on 8-Bit AVR Microcontrollers.
ACM Trans. Embed. Comput. Syst., 2017

Elliptic Curve Cryptography with Efficiently Computable Endomorphisms and Its Hardware Implementations for the Internet of Things.
IEEE Trans. Computers, 2017

Micro-Architectural Power Simulator for Leakage Assessment of Cryptographic Software on ARM Cortex-M3 Processors.
IACR Cryptol. ePrint Arch., 2017

Efficient Implementation of Pedersen Commitments Using Twisted Edwards Curves.
Proceedings of the Mobile, Secure, and Programmable Networking, 2017

Efficient Masking of ARX-Based Block Ciphers Using Carry-Save Addition on Boolean Shares.
Proceedings of the Information Security - 20th International Conference, 2017

2016
Efficient Implementation of NIST-Compliant Elliptic Curve Cryptography for 8-bit AVR-Based Sensor Nodes.
IEEE Trans. Inf. Forensics Secur., 2016

Efficient arithmetic on ARM-NEON and its application for high-speed RSA implementation.
Secur. Commun. Networks, 2016

Implementation of a leakage-resilient ElGamal key encapsulation mechanism.
J. Cryptogr. Eng., 2016

Design Strategies for ARX with Provable Bounds: SPARX and LAX (Full Version).
IACR Cryptol. ePrint Arch., 2016

Design Strategies for ARX with Provable Bounds: Sparx and LAX.
Proceedings of the Advances in Cryptology - ASIACRYPT 2016, 2016

Correlation Power Analysis of Lightweight Block Ciphers: From Theory to Practice.
Proceedings of the Applied Cryptography and Network Security, 2016

Energy-Efficient Elliptic Curve Cryptography for MSP430-Based Wireless Sensor Nodes.
Proceedings of the Information Security and Privacy - 21st Australasian Conference, 2016

2015
VLSI Implementation of Double-Base Scalar Multiplication on a Twisted Edwards Curve with an Efficiently Computable Endomorphism.
IACR Cryptol. ePrint Arch., 2015

Efficient Ring-LWE Encryption on 8-bit AVR Processors.
IACR Cryptol. ePrint Arch., 2015

Higher-Order Masking in Practice: A Vector Implementation of Masked AES for ARM NEON.
Proceedings of the Topics in Cryptology, 2015

Faster Mask Conversion with Lookup Tables.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2015

Efficient Implementation of ECDH Key Exchange for MSP430-Based Wireless Sensor Networks.
Proceedings of the 10th ACM Symposium on Information, 2015

2014
Design and implementation of a versatile cryptographic unit for RISC processors.
Secur. Commun. Networks, 2014

Montgomery Modular Multiplication on ARM-NEON Revisited.
IACR Cryptol. ePrint Arch., 2014

Implementation and Evaluation of a Leakage-Resilient ElGamal Key Encapsulation Mechanism.
IACR Cryptol. ePrint Arch., 2014

Conversion from Arithmetic to Boolean Masking with Logarithmic Complexity.
IACR Cryptol. ePrint Arch., 2014

High-Speed Elliptic Curve Cryptography on the NVIDIA GT200 Graphics Processing Unit.
Proceedings of the Information Security Practice and Experience, 2014

Reverse Product-Scanning Multiplication and Squaring on 8-Bit AVR Processors.
Proceedings of the Information and Communications Security - 16th International Conference, 2014

Secure Conversion between Boolean and Arithmetic Masking of Any Order.
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2014, 2014

MoTE-ECC: Energy-Scalable Elliptic Curve Cryptography for Wireless Sensor Networks.
Proceedings of the Applied Cryptography and Network Security, 2014

2013
New Speed Records for Montgomery Modular Multiplication on 8-bit AVR Microcontrollers.
IACR Cryptol. ePrint Arch., 2013

Algorithms for Switching between Boolean and Arithmetic Masking of Second Order.
Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2013

Efficient Implementation of NIST-Compliant Elliptic Curve Cryptography for Sensor Nodes.
Proceedings of the Information and Communications Security - 15th International Conference, 2013

Low-Weight Primes for Lightweight Elliptic Curve Cryptography on 8-bit AVR Processors.
Proceedings of the Information Security and Cryptology - 9th International Conference, 2013

Twisted edwards-form elliptic curve cryptography for 8-bit AVR-based sensor nodes.
Proceedings of the first ACM workshop on Asia public-key cryptography, 2013

2012
An exploration of mechanisms for dynamic cryptographic instruction set extension.
J. Cryptogr. Eng., 2012

Twisted Edwards-Form Elliptic Curve Cryptography for 8-bit AVR-based Sensor Nodes.
IACR Cryptol. ePrint Arch., 2012

Cryptanalysis of the Full AES Using GPU-Like Special-Purpose Hardware.
Fundam. Informaticae, 2012

Efficient Java Implementation of Elliptic Curve Cryptography for J2ME-Enabled Mobile Devices.
Proceedings of the Information Security Theory and Practice. Security, Privacy and Trust in Computing Systems and Ambient Intelligent Ecosystems, 2012

An 8-bit AVR-Based Elliptic Curve Cryptographic RISC Processor for the Internet of Things.
Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012

2011
Efficient Java Implementation of Elliptic Curve Cryptography for J2ME-Enabled Mobile Devices.
IACR Cryptol. ePrint Arch., 2011

A Unified Multiply/Accumulate Unit for Pairing-Based Cryptography over Prime, Binary and Ternary Fields.
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

2010
Smart Elliptic Curve Cryptography for Smart Dust.
Proceedings of the Quality, Reliability, Security and Robustness in Heterogeneous Networks, 2010

Hardware Trojans for Inducing or Amplifying Side-Channel Leakage of Cryptographic Software.
Proceedings of the Trusted Systems - Second International Conference, 2010

Performance and Security Aspects of Client-Side SSL/TLS Processing on Mobile Devices.
Proceedings of the Cryptology and Network Security - 9th International Conference, 2010

Fresh Re-keying: Security against Side-Channel and Fault Attacks for Low-Cost Devices.
Proceedings of the Progress in Cryptology, 2010

2009
Evaluating Resistance of MCML Technology to Power Analysis Attacks Using a Simulation-Based Methodology.
Trans. Comput. Sci., 2009

Side-Channel Analysis of Cryptographic Software via Early-Terminating Multiplications.
IACR Cryptol. ePrint Arch., 2009

Energy-Efficient Implementation of ECDH Key Exchange for Wireless Sensor Networks.
Proceedings of the Information Security Theory and Practice. Smart Devices, 2009

Realizing Arbitrary-Precision Modular Multiplication with a Fixed-Precision Multiplier Datapath.
Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009

Hardware/Software Co-design of Public-Key Cryptography for SSL Protocol Execution in Embedded Systems.
Proceedings of the Information and Communications Security, 11th International Conference, 2009

Full-Custom VLSI Design of a Unified Multiplier for Elliptic Curve Cryptography on RFID Tags.
Proceedings of the Information Security and Cryptology - 5th International Conference, 2009

Non-deterministic processors: FPGA-based analysis of area, performance and security.
Proceedings of the 4th Workshop on Embedded Systems Security, 2009

2008
Area, Delay, and Power Characteristics of Standard-Cell Implementations of the AES S-Box.
J. Signal Process. Syst., 2008

On Software Parallel Implementation of Cryptographic Pairings.
IACR Cryptol. ePrint Arch., 2008

Enhancing an Embedded Processor Core with a Cryptographic Unit for Speed and Security.
Proceedings of the ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 2008

Reassessing the TCG Specifications for Trusted Computing in Mobile and Embedded Systems.
Proceedings of the IEEE International Workshop on Hardware-Oriented Security and Trust, 2008

Light-Weight Instruction Set Extensions for Bit-Sliced Cryptography.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2008

Workload Characterization of a Lightweight SSL Implementation Resistant to Side-Channel Attacks.
Proceedings of the Cryptology and Network Security, 7th International Conference, 2008

2007
The Energy Cost of Cryptographic Key Establishment in Wireless Sensor Networks.
IACR Cryptol. ePrint Arch., 2007

VLSI Implementation of a Functional Unit to Accelerate ECC and AES on 32-Bit Processors.
Proceedings of the Arithmetic of Finite Fields, First International Workshop, 2007

A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies.
Proceedings of the 2007 International Conference on Embedded Computer Systems: Architectures, 2007

Instruction Set Extensions for Pairing-Based Cryptography.
Proceedings of the Pairing-Based Cryptography, 2007

Cryptographic Side-Channels from Low-Power Cache Memory.
Proceedings of the Cryptography and Coding, 2007

Performance Evaluation of Instruction Set Extensions for Long Integer Modular Arithmetic on a SPARC V8 Processor.
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007

Power Attacks Resistance of Cryptographic S-Boxes with Added Error Detection Circuits.
Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007

Energy evaluation of software implementations of block ciphers under memory constraints.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

Power Analysis Resistant AES Implementation with Instruction Set Extensions.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2007

2006
Area, Delay, and Power Characteristics of Standard-Cell Implementations of the AES S-Box.
Proceedings of the Embedded Computer Systems: Architectures, 2006

Combining algorithm exploration with instruction set design: a case study in elliptic curve cryptography.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

TinySA: a security architecture for wireless sensor networks.
Proceedings of the 2006 ACM Conference on Emerging Network Experiment and Technology, 2006

Instruction Set Extensions for Efficient AES Implementation on 32-bit Processors.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2006

Hardware/Software Co-design of Elliptic Curve Cryptography on an 8051 Microcontroller.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2006

2005
Accelerating AES Using Instruction Set Extensions for Elliptic Curve Cryptography.
Proceedings of the Computational Science and Its Applications, 2005

An Instruction Set Extension for Fast and Memory-Efficient AES Implementation.
Proceedings of the Communications and Multimedia Security, 2005

Energy-Efficient Software Implementation of Long Integer Modular Arithmetic.
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2005, 7th International Workshop, Edinburgh, UK, August 29, 2005

2004
Architectural Enhancements to Support Digital Signal Processing and Public-Key Cryptography.
Proceedings of the Second Workshop on Intelligent Solutions in Embedded Systems, 2004

A Survey of Public-Key Cryptography on J2ME-Enabled Mobile Devices.
Proceedings of the Computer and Information Sciences, 2004

Instruction Set Extensions for Fast Arithmetic in Finite Fields GF( p) and GF(2<sup>m</sup>).
Proceedings of the Cryptographic Hardware and Embedded Systems, 2004

Architectural Support for Arithmetic in Optimal Extension Fields.
Proceedings of the 15th IEEE International Conference on Application-Specific Systems, 2004

A Simple Architectural Enhancement for Fast and Flexible Elliptic Curve Cryptography over Binary Finite Fields GF(2<sup>m</sup>).
Proceedings of the Advances in Computer Systems Architecture, 9th Asia-Pacific Conference, 2004

2003
Architectural Support for Long Integer Modulo Arithmetic on Risc-Based Smart Cards.
Int. J. High Perform. Comput. Appl., 2003

Low-Power Design of a Functional Unit for Arithmetic in Finite Fields GF(p) and GF(2<sup>m</sup>).
Proceedings of the Information Security Applications, 4th International Workshop, 2003

Optimized RISC Architecture for Multiple-Precision Modular Arithmetic.
Proceedings of the Security in Pervasive Computing, 2003

A Versatile and Scalable Digit-Serial/Parallel Multiplier Architecture for Finite Fields GF(2m).
Proceedings of the 2003 International Symposium on Information Technology (ITCC 2003), 2003

A single-cycle (32×32+32+64)-bit multiply/accumulate unit for digital signal processing and public-key cryptography.
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003

Instruction Set Extension for Fast Elliptic Curve Cryptography over Binary Finite Fields GF(2m).
Proceedings of the 14th IEEE International Conference on Application-Specific Systems, 2003

Architectural Enhancements for Montgomery Multiplication on Embedded RISC Processors.
Proceedings of the Applied Cryptography and Network Security, 2003

2002
Instruction Set Extension for Long Integer Modulo Arithmetic on RISC-Based Smart Cards.
Proceedings of the 14th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2002), 2002

A unified radix-4 partial product generator for integers and binary polynomials.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2001
A low-power bit-serial multiplier for finite fields GF(2m).
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

A Bit-Serial Unified Multiplier Architecture for Finite Fields GF(p) and GF(2<sup>m</sup>).
Proceedings of the Cryptographic Hardware and Embedded Systems, 2001

2000
A New Serial/Parallel Architecture for a Low Power Modular Multiplier.
Proceedings of the Information Security for Global Information Infrastructures, 2000

High-Speed RSA Hardware Based on Barret's Modular Reduction Method.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2000

The Chinese Remainder Theorem and its Application in a High-Speed RSA Crypto Chip.
Proceedings of the 16th Annual Computer Security Applications Conference (ACSAC 2000), 2000


  Loading...