David Greenhill

According to our database, David Greenhill authored at least 5 papers between 1995 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2017

3.3 A 14nm 1GHz FPGA with 2.5D transceiver integration.

David Greenhill, Ron Ho, David M. Lewis, Herman Schmit, Kok Hong Chan, Andy Tong, Sean Atsatt, Dana How, Peter McElheny, Keith Duwel, Jeffrey Schulz, Darren Faulkner, Gopal Iyer, George Chen, Hee Kong Phoon, Han Wooi Lim, Wei-Yee Koay, Ty Garibay

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2010

A 40nm 16-core 128-thread CMT SPARC SoC processor.

Jinuk Luke Shin, Kenway W. Tam, Dawei Huang, Bruce Petrick, Ha Pham, Changku Hwang, Hongping Penny Li, Alan P. Smith, Timothy Johnson, Francis Schumacher, David Greenhill, Ana Sonia Leon, Allan Strong

Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2008

Implementation of an 8-Core, 64-Thread, Power-Efficient SPARC Server on a Chip.

Umesh Gajanan Nawathe, Mahmudul Hassan, King C. Yen, Ashok Kumar, Aparna Ramachandran, David Greenhill

IEEE J. Solid State Circuits, 2008

2007

An 8-Core 64-Thread 64b Power-Efficient SPARC SoC.

Umesh Gajanan Nawathe, Mahmudul Hassan, Lynn Warriner, King C. Yen, Bharat Upputuri, David Greenhill, Ashok Kumar, Heechoul Park

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

1995

A 64-b microprocessor with multimedia support.

Lavi Lev, Andy Charnas, Marc Tremblay, Alexander Dalal, Bruce A. Frederick, Chakra R. Srivatsa, David Greenhill, Dennis L. Wendell, Duy Dinh Pham, Eric Anderson, Hemraj K. Hingarh, Inayat Razzack, James M. Kaku, Ken Shin, Marc E. Levitt, Michael Allen, Philip A. Ferolito, Richard L. Bartolotti, Robert K. Yu, Ronald J. Melanson, Shailesh I. Shah, Sophie Nguyen, Sundari S. Mitra, Vinita Reddy, Vidyasagar Ganesan, Willem J. de Lange

IEEE J. Solid State Circuits, November, 1995