Divya Pathak

According to our database1, Divya Pathak authored at least 14 papers between 2014 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.



In proceedings 
PhD thesis 


On csauthors.net:


WNTRAC: Artificial Intelligence Assisted Tracking of Non-pharmaceutical Interventions Implemented Worldwide for COVID-19.
CoRR, 2020

A Canonical Architecture For Predictive Analytics on Longitudinal Patient Records.
CoRR, 2020

Applying Swarm Intelligence to Distributed On-Chip Power Management.
Proceedings of the 37th IEEE International Conference on Computer Design, 2019

ElasticCore: A Dynamic Heterogeneous Platform With Joint Core and Voltage/Frequency Scaling.
IEEE Trans. Very Large Scale Integr. Syst., 2018

On-Chip Power Supply Noise Suppression Through Hyperabrupt Junction Varactors.
IEEE Trans. Very Large Scale Integr. Syst., 2018

Power conversion efficiency-aware mapping of multithreaded applications on heterogeneous architectures: A comprehensive parameter tuning.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

Smart Grid on Chip: Work Load-Balanced On-Chip Power Delivery.
IEEE Trans. Very Large Scale Integr. Syst., 2017

26.2 Power supply noise in a 22nm z13™ microprocessor.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

Work Load Scheduling For Multi Core Systems With Under-Provisioned Power Delivery.
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017

Energy efficient on-chip power delivery with run-time voltage regulator clustering.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Load Balanced On-Chip Power Delivery for Average Current Demand.
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016

Realizing complexity-effective on-chip power delivery for many-core platforms by exploiting optimized mapping.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

ElasticCore: enabling dynamic heterogeneity with joint core and voltage/frequency scaling.
Proceedings of the 52nd Annual Design Automation Conference, 2015

Run-time voltage detection circuit for 3-D IC power delivery.
Proceedings of the 27th IEEE International System-on-Chip Conference, 2014