Thomas Strach

Orcid: 0000-0003-0583-156X

According to our database1, Thomas Strach authored at least 16 papers between 2009 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2022

2020
Proactive power management in IBM z15.
IBM J. Res. Dev., 2020

2019
IBM z14: Processor Characterization and Power Management for High-Reliability Mainframe Systems.
IEEE J. Solid State Circuits, 2019

2018
IBM z14 design methodology enhancements in the 14-nm technology node.
IBM J. Res. Dev., 2018

Droop mitigation using critical-path sensors and an on-chip distributed power supply estimation engine in the z14™ enterprise processor.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017
26.2 Power supply noise in a 22nm z13™ microprocessor.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2015
Robust power management in the IBM z13.
IBM J. Res. Dev., 2015

IBM z13 circuit design and methodology.
IBM J. Res. Dev., 2015

Electronic packaging of the IBM z13 processor drawer.
IBM J. Res. Dev., 2015

2014
Circuit and Physical Design of the zEnterprise™ EC12 Microprocessor Chips and Multi-Chip Module.
IEEE J. Solid State Circuits, 2014

Voltage Noise in Multi-Core Processors: Empirical Characterization and Optimization Opportunities.
Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture, 2014

2013

2012
Circuit and Physical Design Implementation of the Microprocessor Chip for the zEnterprise System.
IEEE J. Solid State Circuits, 2012

Electronic packaging of the IBM System z196 enterprise-class server processor cage.
IBM J. Res. Dev., 2012

2011

2009
Packaging design challenges of the IBM System z10 Enterprise Class server.
IBM J. Res. Dev., 2009


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