Wanyeong Jung

Orcid: 0000-0002-5671-1341

According to our database1, Wanyeong Jung authored at least 31 papers between 2014 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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On csauthors.net:

Bibliography

2023
An Energy-Efficient Delay Insensitive Asynchronous Interface for Globally Asynchronous Locally Synchronous (GALS) System.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

26TSPC: A Low Hold Time, Low Power Flip-Flop With Clock Path Optimization.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A 74.0 dB-SNDR 175.4 dB-FoM Pipelined-SAR ADC Using a Cyclically Charged Floating Inverter Amplifier.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023

2022
MAC-DO: Charge Based Multi-Bit Analog In-Memory Accelerator Compatible with DRAM Using Output Stationary Mapping.
CoRR, 2022

FACTGen: Framework for Automated Circuit Topology Generator.
Proceedings of the 19th International SoC Design Conference, 2022

Kyber Accelerator on FPGA Using Energy-Efficient LUT-Based Barrett Reduction.
Proceedings of the 19th International SoC Design Conference, 2022

A Near-Memory Radix Sort Accelerator with Parallel 1-bit Sorter.
Proceedings of the 30th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2022

2021
CMOS THz-ID: A 1.6-mm² Package-Less Identification Tag Using Asymmetric Cryptography and 260-GHz Far-Field Backscatter Communication.
IEEE J. Solid State Circuits, 2021

An On-Chip Dual-Output Switched-Capacitor DC- DC Converter with Fine-Grained Output Control.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

RectBoost: Start-Up Boosting for Rectenna Using an Adaptive Matching Network.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
29.8 THzID: A 1.6mm2 Package-Less Cryptographic Identification Tag with Backscattering and Beam-Steering at 260GHz.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

Input-Adaptive and Regulated Multi-Output Power Management Unit for Wireless Power Reception and Distribution in Multi-Unit Implantable Devices.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2020

CompAcc: Efficient Hardware Realization for Processing Compressed Neural Networks Using Accumulator Arrays.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2020

2018
Edge pursuit comparator with application in a 74.1dB SNDR, 20KS/s 15b SAR ADC.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

2017
Edge-Pursuit Comparator: An Energy-Scalable Oscillator Collapse-Based Comparator With Application in a 74.1 dB SNDR and 20 kS/s 15 b SAR ADC.
IEEE J. Solid State Circuits, 2017

9.2 A 0.6nJ -0.22/+0.19°C inaccuracy temperature sensor using exponential subthreshold oscillation dependence.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

Low-power switched-capacitor converter design techniques for small IoT systems.
Proceedings of the 2017 European Conference on Circuit Theory and Design, 2017

A start-up boosting circuit with 133× speed gain for 2-transistor voltage reference.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

2016
An oscillator collapse-based comparator with application in a 74.1dB SNDR, 20KS/s 15b SAR ADC.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

12.1 A rational-conversion-ratio switched-capacitor DC-DC converter using negative-output feedback.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

8.5 A 60%-efficiency 20nW-500µW tri-output fully integrated power management unit with environmental adaptation and load-proportional biasing for IoT systems.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2015
A Dual-Slope Capacitance-to-Digital Converter Integrated in an Implantable Pressure-Sensing System.
IEEE J. Solid State Circuits, 2015

A 120nW 8b sub-ranging SAR ADC with signal-dependent charge recycling for biomedical applications.
Proceedings of the Symposium on VLSI Circuits, 2015

27.6 A 0.7pF-to-10nF fully digital capacitance-to-digital converter using iterative delay-chain discharge.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

FOCUS: Key building blocks and integration strategy of a miniaturized wireless sensor node.
Proceedings of the ESSCIRC Conference 2015, 2015

An ultra-low-power biomedical chip for injectable pressure monitor.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2015

2014
An Ultra-Low Power Fully Integrated Energy Harvester Based on Self-Oscillating Switched-Capacitor Voltage Doubler.
IEEE J. Solid State Circuits, 2014

15.4b incremental sigma-delta capacitance-to-digital converter with zoom-in 9b asynchronous SAR.
Proceedings of the Symposium on VLSI Circuits, 2014

27.8 A static contention-free single-phase-clocked 24T flip-flop in 45nm for low-power applications.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

23.3 A 3nW fully integrated energy harvester based on self-oscillating switched-capacitor DC-DC converter.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

Circuit techniques for miniaturized biomedical sensors.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014


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