Edward A. Stott

According to our database1, Edward A. Stott authored at least 21 papers between 2008 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2018
KAPow: High-Accuracy, Low-Overhead Online Per-Module Power Estimation for FPGA Designs.
ACM Trans. Reconfigurable Technol. Syst., 2018

KOCL: Kernel-level Power Estimation for Arbitrary FPGA-SoC-accelerated OpenCL Applications.
Proceedings of the International Workshop on OpenCL, 2018

2017
KOCL: Power Self- Awareness for Arbitrary FPGA-SoC-Accelerated OpenCL Applications.
IEEE Des. Test, 2017

STRIPE: Signal selection for runtime power estimation.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

2016
Knowledge is Power: Module-level Sensing for Runtime Optimisation (Abstact Only).
Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016

KAPow: A System Identification Approach to Online Per-Module Power Estimation in FPGA Designs.
Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016

2015
Adaptive energy minimization of embedded heterogeneous systems using regression-based learning.
Proceedings of the 25th International Workshop on Power and Timing Modeling, 2015

Delay-Bounded Routing for Shadow Registers.
Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

2014
Dynamic voltage & frequency scaling with online slack measurement.
Proceedings of the 2014 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2014

Timing Fault Detection in FPGA-Based Circuits.
Proceedings of the 22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2014

Datapath Synthesis for Overclocking: Online Arithmetic for Latency-Accuracy Trade-offs.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013
Variation and Reliability in FPGAs.
IEEE Des. Test, 2013

SMI: Slack Measurement Insertion for online timing monitoring in FPGAs.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

2012
Online Measurement of Timing in Circuits: For Health Monitoring and Dynamic Voltage & Frequency Scaling.
Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012

2011
Improving FPGA Reliability with Wear-Levelling.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

Health monitoring of live circuits in FPGAs based on time delay measurement (abstract only).
Proceedings of the ACM/SIGDA 19th International Symposium on Field Programmable Gate Arrays, 2011

2010
Fault tolerance and reliability in field-programmable gate arrays.
IET Comput. Digit. Tech., 2010

Degradation Analysis and Mitigation in FPGAs.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

Degradation in FPGAs: measurement and modelling.
Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010

2009
Compensating for variability in FPGAs by re-mapping and re-placement.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

2008
Fault tolerant methods for reliability in FPGAs.
Proceedings of the FPL 2008, 2008


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