Fumiyoshi Matsuoka

According to our database1, Fumiyoshi Matsuoka authored at least 4 papers between 2009 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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Article 
PhD thesis 
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Links

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Bibliography

2025
30.6 A 64Gb DDR4 STT-MRAM Using a Time-Controlled Discharge-Reading Scheme for a .001681µm 1T-1MTJ Cross-Point Cell.
Proceedings of the IEEE International Solid-State Circuits Conference, 2025

2011
Generation of Accurate Reference Current for Data Sensing in High-Density Memories by Averaging Multiple Pairs of Dummy Cells.
IEEE J. Solid State Circuits, 2011

2010
A 1.6 GB/s DDR2 128 Mb Chain FeRAM With Scalable Octal Bitline and Sensing Schemes.
IEEE J. Solid State Circuits, 2010

2009


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