Gaurav Narang

According to our database, Gaurav Narang authored at least 11 papers between 2015 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

Energy-Efficient DNN Inferencing on ReRAM-Based PIM Accelerators Using Heterogeneous Operation Units.

Gaurav Narang, Janardhan Rao Doppa, Partha Pratim Pande

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., June, 2025

Odin: Learning to Optimize Operation Unit Configuration for Energy-efficient DNN Inferencing.

Gaurav Narang, Janardhan Rao Doppa, Partha Pratim Pande

Proceedings of the Design, Automation & Test in Europe Conference, 2025

2024

HuNT: Exploiting Heterogeneous PIM Devices to Design a 3-D Manycore Architecture for DNN Training.

Chukwufumnanya Ogbogu, Gaurav Narang, Biresh Kumar Joardar, Janardhan Rao Doppa, Krishnendu Chakrabarty, Partha Pratim Pande

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2024

TEFLON: Thermally Efficient Dataflow-aware 3D NoC for Accelerating CNN Inferencing on Manycore PIM Architectures.

Gaurav Narang, Chukwufumnanya Ogbogu, Janardhan Rao Doppa, Partha Pratim Pande

ACM Trans. Embed. Comput. Syst., September, 2024

Heterogeneous Manycore In-Memory Computing Architectures.

Chukwufumnanya Ogbogu, Gaurav Narang, Biresh Kumar Joardar, Janardhan Rao Doppa, Partha Pratim Pande

Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024

Dataflow-Aware PIM-Enabled Manycore Architecture for Deep Learning Workloads.

Harsh Sharma, Gaurav Narang, Janardhan Rao Doppa, Ümit Y. Ogras, Partha Pratim Pande

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2023

Dynamic Power Management in Large Manycore Systems: A Learning-to-Search Framework.

Gaurav Narang, Aryan Deshwal, Raid Ayoub, Michael Kishinevsky, Janardhan Rao Doppa, Partha Pratim Pande

ACM Trans. Design Autom. Electr. Syst., September, 2023

Uncertainty-Aware Online Learning for Dynamic Power Management in Large Manycore Systems.

Gaurav Narang, Raid Ayoub, Michael Kishinevsky, Janardhan Rao Doppa, Partha Pratim Pande

Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023

2016

Heterogeneous memory assembly exploration using a floorplan and interconnect aware framework.

Prakhar Raj Gupta, G. S. Visweswaran, Gaurav Narang, Anuj Grover

Proceedings of the 29th IEEE International System-on-Chip Conference, 2016

2015

Statistical Analysis of 64Mb SRAM for Optimizing Yield and Write Performance.

Gaurav Narang, Pragya Sharma, Mansi Jain, Anuj Grover

Proceedings of the 28th International Conference on VLSI Design, 2015

Floorplan and congestion aware framework for optimal SRAM selection for memory subsystems.

Gaurav Narang, Alexander Fell, Prakhar Raj Gupta, Anuj Grover

Proceedings of the 28th IEEE International System-on-Chip Conference, 2015