Gijin Park

According to our database, Gijin Park authored at least 5 papers between 2023 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

A 0.0012mm² 2.4mW 7-bit 3.5GS/s Single-Channel Time-Domain ADC with Folder, Time Amplifier, and Identical Coarse/Fine TDCs in 16nm FinFET.

Mohammad Mahdi Ghahramani, Srujan Kumar Kaile, Gijin Park, Chiho Song, Yuanming Zhu, Il-Min Yi, Sebastian Hoyos, Samuel Palermo

Proceedings of the IEEE Custom Integrated Circuits Conference, 2026

2024

3.2-GHz Digital Phase-Locked Loop With Autocorrelation-Based Direct Jitter Correction.

Gijin Park, Sun-Ho Yeom, InWoo Jang, Dongjun Lee, Jaeduk Han, Min-Seong Choo

IEEE Trans. Circuits Syst. II Express Briefs, September, 2024

Analog Circuit Design Automation via Sequential RL Agents and Gm/ID Methodology.

Sungweon Hong, Yunseob Tae, Dongjun Lee, Gijin Park, Jaemyung Lim, Kyungjun Cho, Chunseok Jeong, Myeong-Jae Park, Songnam Hong, Jaeduk Han

IEEE Access, 2024

Comparisons of Metastability Impact in Time-Domain and Asynchronous SAR ADCs for Serial I/O Receivers.

Gijin Park, Srujan Kumar Kaile, Il-Min Yi, Sebastian Hoyos, Samuel Palermo

Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024

2023

An Automated Design Methodology for Ring Voltage-Controlled Oscillators in Nanometer CMOS Technologies.

Dongjun Lee, Gijin Park, Jaeduk Han, Min-Seong Choo

IEEE Access, 2023