Guillaume Patrigeon

According to our database, Guillaume Patrigeon authored at least 7 papers between 2017 and 2020.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2020

A Universal Spintronic Technology based on Multifunctional Standardized Stack.

Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Lionel Torres, Sophiane Senni, Guillaume Patrigeon, Pascal Benoit, Gregory di Pendina, Guillaume Prenat

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019

Design and Evaluation of a 28-nm FD-SOI STT-MRAM for Ultra-Low Power Microcontrollers.

Guillaume Patrigeon, Pascal Benoit, Lionel Torres, Sophiane Senni, Guillaume Prenat, Gregory di Pendina

IEEE Access, 2019

FlexNode: a reconfigurable Internet of Things node for design evaluation.

Guillaume Patrigeon, Paul Leloup, Pascal Benoit, Lionel Torres

Proceedings of the IEEE Sensors Applications Symposium, 2019

Edge-Computing Perspectives with Reconfigurable Hardware.

Pascal Benoit, Loic Dalmasso, Guillaume Patrigeon, Thierry Gil, Florent Bruguier, Lionel Torres

Proceedings of the 14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2019

2018

From Spintronic Devices to Hybrid CMOS/Magnetic System On Chip.

Sophiane Senni, Frederic Ouattara, Jad Mohdad, Kaan Sevin, Guillaume Patrigeon, Pascal Benoit, Pascal Nouet, Lionel Torres, François Duhem, Gregory di Pendina, Guillaume Prenat

Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration, 2018

FPGA-Based Platform for Fast Accurate Evaluation of Ultra Low Power SoC.

Guillaume Patrigeon, Pascal Benoit, Lionel Torres

Proceedings of the 28th International Symposium on Power and Timing Modeling, 2018

2017

A novel SRAM - STT-MRAM hybrid cache implementation improving cache performance.

Odilia Coi, Guillaume Patrigeon, Sophiane Senni, Lionel Torres, Pascal Benoit

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2017