Sophiane Senni

According to our database, Sophiane Senni authored at least 15 papers between 2014 and 2020.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2020

A Universal Spintronic Technology based on Multifunctional Standardized Stack.

Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Lionel Torres, Sophiane Senni, Guillaume Patrigeon, Pascal Benoit, Gregory di Pendina, Guillaume Prenat

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019

Design and Evaluation of a 28-nm FD-SOI STT-MRAM for Ultra-Low Power Microcontrollers.

Guillaume Patrigeon, Pascal Benoit, Lionel Torres, Sophiane Senni, Guillaume Prenat, Gregory di Pendina

IEEE Access, 2019

2018

From Spintronic Devices to Hybrid CMOS/Magnetic System On Chip.

Sophiane Senni, Frederic Ouattara, Jad Mohdad, Kaan Sevin, Guillaume Patrigeon, Pascal Benoit, Pascal Nouet, Lionel Torres, François Duhem, Gregory di Pendina, Guillaume Prenat

Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration, 2018

Using multifunctional standardized stack as universal spintronic technology for IoT.

Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Sophiane Senni, Jad Mohdad, Frédérick Mailly, Lionel Torres, Pascal Benoit, Abdoulaye Gamatié, Pascal Nouet, Frederic Ouattara, Gilles Sassatelli, Kotb Jabeur, Pierre Vanhauwaert, A. Atitoaie, I. Firastrau, Gregory di Pendina, Guillaume Prenat

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Main memory organization trade-offs with DRAM and STT-MRAM options based on gem5-NVMain simulation frameworks.

Manu Komalan, Oh Hyung Rock, Matthias Hartmann, Sushil Sakhare, Christian Tenllado, José Ignacio Gómez, Gouri Sankar Kar, Arnaud Furnémont, Francky Catthoor, Sophiane Senni, David Novo, Abdoulaye Gamatié, Lionel Torres

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017

A novel SRAM - STT-MRAM hybrid cache implementation improving cache performance.

Odilia Coi, Guillaume Patrigeon, Sophiane Senni, Lionel Torres, Pascal Benoit

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2017

GREAT: HeteroGeneous IntegRated Magnetic tEchnology Using Multifunctional Standardized sTack.

Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Sophiane Senni, Jad Mohdad, Frédérick Mailly, Lionel Torres, Pascal Benoit, Pascal Nouet, Rui Ma, Martin Kreißig, Frank Ellinger, Kotb Jabeur, Pierre Vanhauwaert, Gregory di Pendina, Guillaume Prenat

Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

Embedded systems to high performance computing using STT-MRAM.

Sophiane Senni, Thibaud Delobelle, Odilia Coi, Pierre-Yves Peneau, Lionel Torres, Abdoulaye Gamatié, Pascal Benoit, Gilles Sassatelli

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016

Non-Volatile Processor Based on MRAM for Ultra-Low-Power IoT Devices.

Sophiane Senni, Lionel Torres, Gilles Sassatelli, Abdoulaye Gamatié

ACM J. Emerg. Technol. Comput. Syst., 2016

Exploring MRAM Technologies for Energy Efficient Systems-On-Chip.

Sophiane Senni, Lionel Torres, Gilles Sassatelli, Abdoulaye Gamatié, Bruno Mussard

IEEE J. Emerg. Sel. Topics Circuits Syst., 2016

Loop optimization in presence of STT-MRAM caches: A study of performance-energy tradeoffs.

Pierre-Yves Peneau, Rabab Bouziane, Abdoulaye Gamatié, Erven Rohou, Florent Bruguier, Gilles Sassatelli, Lionel Torres, Sophiane Senni

Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016

2015

Emerging Non-volatile Memory Technologies Exploration Flow for Processor Architecture.

Sophiane Senni, Lionel Torres, Gilles Sassatelli, Abdoulaye Gamatié, Bruno Mussard

Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015

Potential applications based on NVM emerging technologies.

Sophiane Senni, Raphael Martins Brum, Lionel Torres, Gilles Sassatelli, Abdoulaye Gamatié, Bruno Mussard

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014

Power efficient Thermally Assisted Switching Magnetic memory based memory systems.

Sophiane Senni, Lionel Torres, Gilles Sassatelli, Anastasiia Butko, Bruno Mussard

Proceedings of the 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip, 2014

Exploration of Magnetic RAM Based Memory Hierarchy for Multicore Architecture.

Sophiane Senni, Lionel Torres, Gilles Sassatelli, Anastasiia Butko, Bruno Mussard

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014