Hakaru Tamukoh

Orcid: 0000-0002-3669-1371

According to our database1, Hakaru Tamukoh authored at least 84 papers between 2006 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Links

On csauthors.net:

Bibliography

2023
Hibikino-Musashi@Home 2023 Team Description Paper.
CoRR, 2023

Self-Organizing Multiple Readouts for Reservoir Computing.
IEEE Access, 2023

Memory-Efficient Implementation of GMM-MRCoHOG for Human Recognition Hardware.
Proceedings of the 18th International Joint Conference on Computer Vision, 2023

Autonomous Waiter Robot System for Recognizing Customers, Taking Orders, and Serving Food.
Proceedings of the RoboCup 2023: Robot World Cup XXVI [Bordeaux, France, 4-10 July, 2023]., 2023

Dense Traversability Estimation System for Extreme Environments.
Proceedings of the IEEE Intelligent Vehicles Symposium, 2023

In-material reservoir implementation of reservoir-based convolution.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

FPGA Implementation of a Chaotic Boltzmann Machine Annealer.
Proceedings of the International Joint Conference on Neural Networks, 2023

Efficient Repetition Coding for Deep Learning Towards Implementation Using Emerging Non-Volatile Memory with Write-Errors.
Proceedings of the International Joint Conference on Neural Networks, 2023

Traffic Flow Optimization using a Chaotic Boltzmann Machine Annealer on an FPGA.
Proceedings of the International Conference on Field Programmable Technology, 2023

LUTNet-RC: Look-Up Tables Networks for Reservoir Computing on an FPGA.
Proceedings of the International Conference on Field Programmable Technology, 2023

ManifoldNeRF: View-dependent Image Feature Supervision for Few-shot Neural Radiance Fields.
Proceedings of the 34th British Machine Vision Conference 2023, 2023

2022
Hibikino-Musashi@Home 2022 Team Description Paper.
CoRR, 2022

Hibikino-Musashi@Home 2018 Team Description Paper.
CoRR, 2022

Solution of World Robot Challenge 2020 Partner Robot Challenge (Real Space).
Adv. Robotics, 2022

Emergence of In-Materio Intelligence from an Incidental Structure of a Single-Walled Carbon Nanotube-Porphyrin Polyoxometalate Random Network.
Adv. Intell. Syst., 2022

An Implementation Method Using Cut-Off Bits for Restricted Boltzmann Machines Without Random Number Generators.
IEEE Access, 2022

Hardware-oriented Algorithm for Human Detection using GMM-MRCoHOG Features.
Proceedings of the 17th International Joint Conference on Computer Vision, 2022

Applying Center Loss to Multidimensional Feature Space in Deep Neural Networks for Open-set Recognition.
Proceedings of the 17th International Joint Conference on Computer Vision, 2022

A memory-based entorhinal-hippocampal model and its FPGA implementation by on-chip RAMs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Desgin and Implementation of ROS2-based Autonomous Tiny Robot Car with Integration of Multiple ROS2 FPGA Nodes.
Proceedings of the International Conference on Field-Programmable Technology, 2022

2021
A Sub-Model Detachable Convolutional Neural Network.
J. Robotics Netw. Artif. Life, 2021

Network with Sub-networks: Layer-wise Detachable Neural Network.
J. Robotics Netw. Artif. Life, 2021

FPGA Implementation of a Binarized Dual Stream Convolutional Neural Network for Service Robots.
J. Robotics Mechatronics, 2021

An efficient hardware-oriented dropout algorithm.
Neurocomputing, 2021

An Energy-Efficient Time-Domain Analog CMOS BinaryConnect Neural Network Processor Based on a Pulse-Width Modulation Approach.
IEEE Access, 2021

Brain-inspired neural network navigation system with hippocampus, prefrontal cortex, and amygdala functions.
Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems, 2021

Open Set Recognition Using the Feature Space of Deep Neural Networks.
Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems, 2021

A Color Image Quantization Method Considering Chromatic Visual Impression.
Proceedings of the 20th International Symposium on Communications and Information Technologies, 2021

FPGA Implementation of Pulse-Coupled Phase Oscillators working as a Reservoir at the Edge of Chaos.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

An area-efficient multiply-accumulation architecture and implementations for time-domain neural processing.
Proceedings of the International Conference on Field-Programmable Technology, 2021

A dataset generation for object recognition and a tool for generating ROS2 FPGA node.
Proceedings of the International Conference on Field-Programmable Technology, 2021

2020
A Hardware-Oriented Echo State Network and its FPGA Implementation.
J. Robotics Netw. Artif. Life, 2020

Training Autoencoder using Three Different Reversed Color Models for Anomaly Detection.
J. Robotics Netw. Artif. Life, 2020

Semi-Automatic Dataset Generation for Object Detection and Recognition and its Evaluation on Domestic Service Robots.
J. Robotics Mechatronics, 2020

Hibikino-Musashi@Home 2019 Team Description Paper.
CoRR, 2020

Hibikino-Musashi@Home 2020 Team Description Paper.
CoRR, 2020

A hardware intelligent processing accelerator for domestic service robots.
Adv. Robotics, 2020

An Amygdala-Inspired Classical Conditioning Model Implemented on an FPGA for Home Service Robots.
IEEE Access, 2020

FPGA Implementation of Hardware-Oriented Chaotic Boltzmann Machines.
IEEE Access, 2020

Hardware-Oriented Dual Stream Object Recognition System using Binarized Neural Networks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Live Demonstration: Hardware-Oriented Dual Stream Object Recognition System using Binarized Neural Networks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Design and Implementation of Pulse-Coupled Phase Oscillators on a Field-Programmable Gate Array for Reservoir Computing.
Proceedings of the Neural Information Processing - 27th International Conference, 2020

2019
Network with Sub-Networks.
CoRR, 2019

An Energy-efficient Time-domain Analog VLSI Neural Network Processor Based on a Pulse-width Modulation Approach.
CoRR, 2019

Live Demonstration: A VLSI Implementation of Time-Domain Analog Weighted-Sum Calculation Model for Intelligent Processing on Robots.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Hardware Implementation of Brain-Inspired Amygdala Model.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Live Demonstration: Hardware Implementation of Brain-Inspired Amygdala Model.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

A Chaotic Boltzmann Machine Working as a Reservoir and Its Analog VLSI Implementation.
Proceedings of the International Joint Conference on Neural Networks, 2019

Reservoir Computing Based on Dynamics of Pseudo-Billiard System in Hypercube.
Proceedings of the International Joint Conference on Neural Networks, 2019

High-Speed Synchronization of Pulse-Coupled Phase Oscillators on Multi-FPGA.
Proceedings of the Neural Information Processing - 26th International Conference, 2019

2018
Foreword.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2018

A Time-domain Analog Weighted-sum Calculation Model for Extremely Low Power VLSI Implementation of Multi-layer Neural Networks.
CoRR, 2018

Object Recognition System using Deep Learning with Depth Images for Service Robots.
Proceedings of the 2018 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), 2018

Reverse Reconstruction of Anomaly Input Using Autoencoders.
Proceedings of the 2018 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), 2018

A Hardware Accelerated Robot Middleware Package for Intelligent Processing on Robots.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Live Demonstration: A Hardware Accelerated Robot Middleware Package for Intelligent Processing on Robots.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Mixed Precision Weight Networks: Training Neural Networks with Varied Precision Weights.
Proceedings of the Neural Information Processing - 25th International Conference, 2018

2017
Synchronization of Pulse-Coupled Phase Oscillators over Multi-FPGA Communication Links.
J. Robotics Netw. Artif. Life, 2017

Hibikino-Musashi@Home 2017 Team Description Paper.
CoRR, 2017

Evaluation of Hardware Oriented MRCoHOG using Logic Simulation.
Proceedings of the 12th International Joint Conference on Computer Vision, Imaging and Computer Graphics Theory and Applications (VISIGRAPP 2017) - Volume 5: VISAPP, Porto, Portugal, February 27, 2017

A CMOS chaotic Boltzmann machine circuit and three-neuron network operation.
Proceedings of the 2017 International Joint Conference on Neural Networks, 2017

A Hardware-Oriented Dropout Algorithm for Efficient FPGA Implementation.
Proceedings of the Neural Information Processing - 24th International Conference, 2017

2016
Lightness Modification Method Considering Craik-O'Brien Effect for Protanopia and Deuteranopia.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2016

Depth-Based Visual Servoing Using Low-Accurate Arm.
Proceedings of the 2016 Joint 8th International Conference on Soft Computing and Intelligent Systems (SCIS) and 17th International Symposium on Advanced Intelligent Systems (ISIS), 2016

A CMOS Unit Circuit Using Subthreshold Operation of MOSFETs for Chaotic Boltzmann Machines.
Proceedings of the Neural Information Processing - 23rd International Conference, 2016

Time-Domain Weighted-Sum Calculation for Ultimately Low Power VLSI Neural Networks.
Proceedings of the Neural Information Processing - 23rd International Conference, 2016

FPGA Implementation of Autoencoders Having Shared Synapse Architecture.
Proceedings of the Neural Information Processing - 23rd International Conference, 2016

Restricted Boltzmann Machines Without Random Number Generators for Efficient Digital Hardware Implementation.
Proceedings of the Artificial Neural Networks and Machine Learning - ICANN 2016, 2016

2015
Parameterized digital hardware design of pulse-coupled phase oscillator networks.
Neurocomputing, 2015

A Multidimensional Configurable Processor Array - Vocalise.
IEICE Trans. Inf. Syst., 2015

A Color Quantization Based on Vector Error Diffusion and Particle Swarm Optimization Considering Human Visibility.
Proceedings of the Image and Video Technology - 7th Pacific-Rim Symposium, 2015

Improvement of lightness modification method based on Craik-O'Brien effect for dichromats.
Proceedings of the 2015 International Symposium on Intelligent Signal Processing and Communication Systems, 2015

2014
Fuzzy-rule-embedded Reduction Image Construction Method for Image Enlargement with High Magnification.
Proceedings of the VISAPP 2014, 2014

Morphological Associative Memory Employing a Split Store Method.
Proceedings of the Neural Information Processing - 21st International Conference, 2014

2013
Design of networked hw/sw complex system using hardware object model and its application.
Proceedings of the IECON 2013, 2013

Parameterized Digital Hardware Design of Pulse-Coupled Phase Oscillator Model toward Spike-Based Computing.
Proceedings of the Neural Information Processing - 20th International Conference, 2013

2012
Live demonstration: "Internet Booster" a novel WEB application platform accelerated by reconfigurable virtual hardware circuits.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2D/3D FPGA array for brain process and numerical computation.
Proceedings of the Eighth International Conference on Natural Computation, 2012

2011
Rough winner-take-all for hardware oriented vector quantization algorithm.
IEICE Electron. Express, 2011

2010
Emotional Behavior and Expression Based on a Neural Network Model of Amygdala.
Proceedings of the Brain-Inspired Information Technology, 2010

Effective and Adaptive Learning Based on Diversive/Specific Curiosity.
Proceedings of the Brain-Inspired Information Technology, 2010

A Dynamically Reconfigurable Platform for Self-Organizing Neural Network Hardware.
Proceedings of the Neural Information Processing. Models and Applications, 2010

2007
A bit-shifting-based fuzzy inference for self-organizing relationship (SOR) network.
IEICE Electron. Express, 2007

2006
A Digital Hardware Architecture of Self-Organizing Relationship (SOR) Network.
Proceedings of the Neural Information Processing, 13th International Conference, 2006


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