Hanki Jeoung

According to our database1, Hanki Jeoung authored at least 3 papers between 2012 and 2015.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2015
17.7 A digital DLL with hybrid DCC using 2-step duty error extraction and 180° phase aligner for 2.67Gb/S/pin 16Gb 4-H stack DDR4 SDRAM with TSVs.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2013
A 1.2 V 30 nm 3.2 Gb/s/pin 4 Gb DDR4 SDRAM With Dual-Error Detection and PVT-Tolerant Data-Fetch Scheme.
IEEE J. Solid State Circuits, 2013

2012
A 1.2V 30nm 3.2Gb/s/pin 4Gb DDR4 SDRAM with dual-error detection and PVT-tolerant data-fetch scheme.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012


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