Haotian Lu

Orcid: 0009-0007-8919-5367

Affiliations:
  • University of California Riverside, CA, USA
  • Arizona State University, Tempe, AZ, USA (former)
  • Tianjin University, School of Microelectronics, China (former)


According to our database1, Haotian Lu authored at least 12 papers between 2023 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

Online presence:

On csauthors.net:

Bibliography

2026
EMSpice 3: Full-chip Temperature-Aware Multiphysics Electromigration and IR-Drop Analysis.
CoRR, April, 2026

WarPGNN: A Parametric Thermal Warpage Analysis Framework with Physics-aware Graph Neural Network.
CoRR, March, 2026

Accelerating Physics-Based Electromigration Analysis via Rational Krylov Subspaces.
CoRR, February, 2026

BPINN-EM-Post: Bayesian Physics-Informed Neural Network based Stochastic Electromigration Damage Analysis in the Post-void Phase.
Proceedings of the 27th International Symposium on Quality Electronic Design, 2026

2025
EMSpice 2.1: A Coupled EM and IR Drop Analysis Tool with Joule Heating and Thermal Map Integration for VLSI Reliability.
CoRR, July, 2025

BPINN-EM-Post: Stochastic Electromigration Damage Analysis in the Post-Void Phase based on Bayesian Physics-Informed Neural Network.
CoRR, March, 2025

EMSpice 2.1: A Coupled EM and IR Drop Analysis Tool with Joule Heating and Thermal Mapb Integration for VLSI Reliability.
Proceedings of the 21st International Conference on Synthesis, 2025

Power Map Characterization and Modeling for Commercial CPU/GPUs Considering Temperature Dependence.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2025

The Unlikely Hero: Nonidealities in Analog Photonic Neural Networks as Built-in Adversarial Defenders.
Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025

2024
The Unlikely Hero: Nonideality in Analog Photonic Neural Networks as Built-in Defender Against Adversarial Attacks.
CoRR, 2024

DOCTOR: Dynamic On-Chip Remediation Against Temporally-Drifting Thermal Variations Toward Self-Corrected Photonic Tensor Accelerators.
CoRR, 2024

2023
Energy-efficient NTT Design with One-bank SRAM and 2-D PE Array.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023


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