Harold Ishebabi

According to our database, Harold Ishebabi authored at least 16 papers between 2006 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2019

MeXT: A Flow for Multiprocessor Exploration.

Christophe Bobda, Harold Ishebabi, Philipp Mahr, Joel Mandebi Mbongue, Sujan Kumar Saha

Proceedings of the 2019 IEEE High Performance Extreme Computing Conference, 2019

2018

High-level synthesis of on-chip multiprocessor architectures based on answer set programming.

Christophe Bobda, Franck Yonga, Martin Gebser, Harold Ishebabi, Torsten Schaub

J. Parallel Distributed Comput., 2018

2010

Heuristics for Flexible CMP Synthesis.

Harold Ishebabi, Christophe Bobda

IEEE Trans. Computers, 2010

Application-driven architecture synthesis of on-chip Multiprocessor systems.

Christophe Bobda, Philipp Mahr, Benjamin Andres, Harold Ishebabi

Proceedings of the 2010 International Conference on High Performance Computing & Simulation, 2010

2009

Architecture synthesis for adaptive multiprocessor systems on chip.

Harold Ishebabi

PhD thesis, 2009

Automated architecture synthesis for parallel programs on FPGA multiprocessor systems.

Harold Ishebabi, Christophe Bobda

Microprocess. Microsystems, 2009

Answer Set versus Integer Linear Programming for Automatic Synthesis of Multiprocessor Systems from Real-Time Parallel Programs.

Harold Ishebabi, Philipp Mahr, Christophe Bobda, Martin Gebser, Torsten Schaub

Int. J. Reconfigurable Comput., 2009

Application of ASP for Automatic Synthesis of Flexible Multiprocessor Systems from Parallel Programs.

Harold Ishebabi, Philipp Mahr, Christophe Bobda, Martin Gebser, Torsten Schaub

Proceedings of the Logic Programming and Nonmonotonic Reasoning, 2009

2008

Prefabrication and postfabrication architecture exploration for partially reconfigurable VLIW processors.

Anupam Chattopadhyay, Harold Ishebabi, Xiaolin Chen, Zoltan Endre Rakosi, Kingshuk Karuri, David Kammler, Rainer Leupers, Gerd Ascheid, Heinrich Meyr

ACM Trans. Embed. Comput. Syst., 2008

SoC-MPI: A Flexible Message Passing Library for Multiprocessor Systems-on-Chips.

Philipp Mahr, Christian Lorchner, Harold Ishebabi, Christophe Bobda

Proceedings of the ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 2008

Automatic Synthesis of Multiprocessor Systems from Parallel Programs under Preemptive Scheduling.

Harold Ishebabi, Philipp Mahr, Christophe Bobda

Proceedings of the ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 2008

Makespan minimization in automatic synthesis of multiprocessor systems from parallel programs.

Harold Ishebabi, Philipp Mahr, Christophe Bobda

Proceedings of the 2008 International Conference on Field-Programmable Technology, 2008

High-level Modelling and Exploration of Coarse-grained Re-configurable Architectures.

Anupam Chattopadhyay, Xiaolin Chen, Harold Ishebabi, Rainer Leupers, Gerd Ascheid, Heinrich Meyr

Proceedings of the Design, Automation and Test in Europe, 2008

2006

An efficient parallelization technique for high throughput FFT-ASIPs.

Harold Ishebabi, Gerd Ascheid, Heinrich Meyr, Oguzhan Atak, Abdullah Atalar, Erdal Arikan

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Design of Application Specific Processors for the Cached FFT Algorithm.

Oguzhan Atak, Abdullah Atalar, Erdal Arikan, Harold Ishebabi, David Kammler, Gerd Ascheid, Heinrich Meyr, Mario Nicola, Guido Masera

Proceedings of the 2006 IEEE International Conference on Acoustics Speech and Signal Processing, 2006

Automatic ADL-based operand isolation for embedded processors.

Anupam Chattopadhyay, B. Geukes, David Kammler, Ernst Martin Witte, Oliver Schliebusch, Harold Ishebabi, Rainer Leupers, Gerd Ascheid, Heinrich Meyr

Proceedings of the Conference on Design, Automation and Test in Europe, 2006