Heiko Zimmer

According to our database1, Heiko Zimmer authored at least 7 papers between 2003 and 2005.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2005
High level hardware/software communication estimation in shared memory architecture.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Buffer-Architecture Exploration for Routers in a Hierarchical Network-on-Chip.
Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005

Deadlock-free routing and component placement for irregular mesh-based networks-on-chip.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

2004
On Timing and Power Consumption in Inductively Coupled On-Chip Interconnects.
Proceedings of the Integrated Circuit and System Design, 2004

Reconfigurable platforms for ubiquitous computing.
Proceedings of the First Conference on Computing Frontiers, 2004

2003
Hinoc: A Hierarchical Generic Approach for on-Chip Communication, Testing and Debugging of SoCs.
Proceedings of the VLSI-SOC: From Systems to Chips, 2003

A fault model notation and error-control scheme for switch-to-switch buses in a network-on-chip.
Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2003


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