Mihail Petrov

According to our database1, Mihail Petrov authored at least 18 papers between 2003 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
Modelling Distributed Fault-Tolerant High Availability Storage Cluster Based on Block-Chain Concepts for Tracking Scientific-Research Progress.
Proceedings of the 10th IEEE International Conference on Intelligent Systems, 2020

2008
System Components and Design for OFDM-Based Broadcasting Receivers
PhD thesis, 2008

2007
An Efficient Fractional-Rate Interpolation Architecture.
Proceedings of the Global Communications Conference, 2007

A Scalable Resampling Architecture.
Proceedings of the Global Communications Conference, 2007

2005
Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques.
Proceedings of the Embedded Computer Systems: Architectures, 2005

A linear model for high-level delay estimation in VDSM on-chip interconnects.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A State-Serial Viterbi Decoder Architecture for Digital Radio on FPGA.
Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology, 2005

Optimal FFT Architecture Selection for OFDM Receivers on FPGA.
Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology, 2005

2004
Accurate capture of timing parameters in inductively-coupled on-chip interconnects.
Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, 2004

On Timing and Power Consumption in Inductively Coupled On-Chip Interconnects.
Proceedings of the Integrated Circuit and System Design, 2004

Flexible Overhead Processing Architectures for G.709 Optical Transport Networks.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2004

Dynamic power optimization of the trace-back process for the Viterbi algorithm.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

The XPP Architecture and Its Co-simulation Within the Simulink Environment.
Proceedings of the Field Programmable Logic and Application, 2004

Adaptive architectures for an OTN processor: reducing design costs through reconfigurability and multiprocessing.
Proceedings of the First Conference on Computing Frontiers, 2004

Reconfigurable platforms for ubiquitous computing.
Proceedings of the First Conference on Computing Frontiers, 2004

2003
An Adaptive Trace-Back Solution for State-Parallel Viterbi Decoders.
Proceedings of the IFIP VLSI-SoC 2003, 2003

A multi-path high speed Viterbi decoder.
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003

Evaluation and Run-Time Optimization of On-chip Communication Structures in Reconfigurable Architectures.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003


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