Heiner Bauer
Orcid: 0000-0001-7916-3774
According to our database1,
Heiner Bauer
authored at least 10 papers
between 2017 and 2023.
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Bibliography
2023
A RISC-V MCU with adaptive reverse body bias and ultra-low-power retention mode in 22 nm FD-SOI.
Proceedings of the 20th International SoC Design Conference, 2023
A 12-ADC 25-Core Smart MPSoC Using ABB in 22FDX for 77GHz MIMO Radars at 52.6mW Average Power.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023
2022
A 16-Channel Fully Configurable Neural SoC With 1.52 $\mu$W/Ch Signal Acquisition, 2.79 $\mu$W/Ch Real-Time Spike Classifier, and 1.79 TOPS/W Deep Neural Network Accelerator in 22 nm FDSOI.
IEEE Trans. Biomed. Circuits Syst., 2022
2021
IEEE Trans. Very Large Scale Integr. Syst., 2021
Proceedings of the IECON 2021, 2021
2020
Adaptive Body Bias Aware Implementation for Ultra-Low-Voltage Designs in 22FDX Technology.
IEEE Trans. Circuits Syst. II Express Briefs, 2020
A 0.55V 6.3uW/MHz Arm Cortex-M4 MCU with Adaptive Reverse Body Bias and Single Rail SRAM.
Proceedings of the 2020 IEEE Symposium in Low-Power and High-Speed Chips, 2020
2019
Hard Real-Time Capable OPC UA Server as Hardware Peripheral for Single Chip IoT Systems.
Proceedings of the 24th IEEE International Conference on Emerging Technologies and Factory Automation, 2019
How to Achieve World-Leading Energy Efficiency using 22FDX with Adaptive Body Biasing on an Arm Cortex-M4 IoT SoC.
Proceedings of the 49th European Solid-State Device Research Conference, 2019
2017
Exploration of FPGA architectures for tight coupled accelerators in a 22nm FDSOI technology.
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2017