Johannes Partzsch
Orcid: 0000-0002-6286-5064
According to our database1,
Johannes Partzsch
authored at least 55 papers
between 2008 and 2023.
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Bibliography
2023
CoRR, 2023
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
A Low-Power Hardware Accelerator of MFCC Extraction for Keyword Spotting in 22nm FDSOI.
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023
2022
Hardware-Efficient Ultrasonic Entrance Counting: Comparing Different Machine Learning Approaches.
Proceedings of the 26th International Conference on Pattern Recognition, 2022
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
ZEN: A flexible energy-efficient hardware classifier exploiting temporal sparsity in ECG data.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
2021
Comparing Loihi with a SpiNNaker 2 prototype on low-latency keyword spotting and adaptive robotic control.
Neuromorph. Comput. Eng., 2021
IEEE Des. Test, 2021
The SpiNNaker 2 Processing Element Architecture for Hybrid Digital Neuromorphic Computing.
CoRR, 2021
Delay-Based Neural Computation: Pulse Routing Architecture and Benchmark Application in FPGA.
Proceedings of the 28th IEEE International Conference on Electronics, 2021
Analyzing ARM CoreSight ETMv4.x Data Trace Stream with a Real-time Hardware Accelerator.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
2020
Mean Field Approach for Configuring Population Dynamics on a Biohybrid Neuromorphic System.
J. Signal Process. Syst., 2020
Low-Power Low-Latency Keyword Spotting and Adaptive Control with a SpiNNaker 2 Prototype and Comparison with Loihi.
CoRR, 2020
Proceedings of the NICE '20: Neuro-inspired Computational Elements Workshop, 2020
Event-based Neural Network for ECG Classification with Delta Encoding and Early Stopping.
Proceedings of the 6th International Conference on Event-Based Control, 2020
2019
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
IEEE Trans. Biomed. Circuits Syst., 2019
2017
Neuromorphic Hardware In The Loop: Training a Deep Spiking Network on the BrainScaleS Wafer-Scale System.
CoRR, 2017
CoRR, 2017
Exploration of FPGA architectures for tight coupled accelerators in a 22nm FDSOI technology.
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Live demonstration: Dynamic voltage and frequency scaling for neuromorphic many-core systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Neuromorphic hardware in the loop: Training a deep spiking network on the BrainScaleS wafer-scale system.
Proceedings of the 2017 International Joint Conference on Neural Networks, 2017
2016
IEEE Trans. Very Large Scale Integr. Syst., 2016
A Biological-Realtime Neuromorphic System in 28 nm CMOS Using Low-Leakage Switched Capacitor Circuits.
IEEE Trans. Biomed. Circuits Syst., 2016
2014
PhD thesis, 2014
Switched-Capacitor Realization of Presynaptic Short-Term-Plasticity and Stop-Learning Synapses in 28 nm CMOS.
CoRR, 2014
CoRR, 2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
VLSI implementation of a conductance-based multi-synapse using switched-capacitor circuits.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Configurable pulse routing architecture for accelerated multi-node neuromorphic systems.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014
2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Proceedings of the 2013 International Joint Conference on Neural Networks, 2013
Live demonstration: Ethernet communication linking two large-scale neuromorphic systems.
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013
2012
Accuracy evaluation of numerical methods used in state-of-the-art simulators for spiking neural networks.
J. Comput. Neurosci., 2012
Developing structural constraints on connectivity for biologically embedded neural networks.
Biol. Cybern., 2012
Proceedings of the Advances in Neural Information Processing Systems 25: 26th Annual Conference on Neural Information Processing Systems 2012. Proceedings of a meeting held December 3-6, 2012
Live demonstration: A scaled-down version of the BrainScaleS wafer-scale neuromorphic system.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
Dedicated FPGA communication architecture and design for a large-scale neuromorphic system.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
2011
Analyzing the Scaling of Connectivity in Neuromorphic Hardware and in Models of Neural Networks.
IEEE Trans. Neural Networks, 2011
A comprehensive workflow for general-purpose neural modeling with highly configurable neuromorphic hardware systems.
Biol. Cybern., 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011
2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Highly integrated packet-based AER communication infrastructure with 3Gevent/S throughput.
Proceedings of the 17th IEEE International Conference on Electronics, 2010
Proceedings of the 18th European Symposium on Artificial Neural Networks, 2010
2009
Neurocomputing, 2009
On the Relation between Bursts and Dynamic Synapse Properties: A Modulation-Based Ansatz.
Comput. Intell. Neurosci., 2009
Proceedings of the 17th European Symposium on Artificial Neural Networks, 2009
2008
Proceedings of the Advances in Neuro-Information Processing, 15th International Conference, 2008