Hsiao-Yu Huang
According to our database1,
Hsiao-Yu Huang
authored at least 4 papers
between 2015 and 2022.
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Bibliography
2022
A 22-nm 1-Mb 1024-b Read Data-Protected STT-MRAM Macro With Near-Memory Shift-and-Rotate Functionality and 42.6-GB/s Read Bandwidth for Security-Aware Mobile Device.
IEEE J. Solid State Circuits, 2022
A 22nm 4Mb STT-MRAM Data-Encrypted Near-Memory Computation Macro with a 192GB/s Read-and-Decryption Bandwidth and 25.1-55.1TOPS/W 8b MAC for AI Operations.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
2020
13.4 A 22nm 1Mb 1024b-Read and Near-Memory-Computing Dual-Mode STT-MRAM Macro with 42.6GB/s Read Bandwidth for Security-Aware Mobile Devices.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2015
Detection and analysis of the designed circuit for ambulatory ECG electrical characteristic points.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2015