Ssu-Yen Wu
According to our database1,
Ssu-Yen Wu
authored at least 9 papers
between 2012 and 2022.
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Bibliography
2022
A 22-nm 1-Mb 1024-b Read Data-Protected STT-MRAM Macro With Near-Memory Shift-and-Rotate Functionality and 42.6-GB/s Read Bandwidth for Security-Aware Mobile Device.
IEEE J. Solid State Circuits, 2022
2021
A Local Computing Cell and 6T SRAM-Based Computing-in-Memory Macro With 8-b MAC Operation for Edge AI Chips.
IEEE J. Solid State Circuits, 2021
2020
A Twin-8T SRAM Computation-in-Memory Unit-Macro for Multibit CNN-Based AI Edge Processors.
IEEE J. Solid State Circuits, 2020
15.5 A 28nm 64Kb 6T SRAM Computing-in-Memory Macro with 8b MAC Operation for AI Edge Chips.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
13.4 A 22nm 1Mb 1024b-Read and Near-Memory-Computing Dual-Mode STT-MRAM Macro with 42.6GB/s Read Bandwidth for Security-Aware Mobile Devices.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2019
A 5.1pJ/Neuron 127.3us/Inference RNN-based Speech Recognition Processor using 16 Computing-in-Memory SRAM Macros in 65nm CMOS.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
A Twin-8T SRAM Computation-In-Memory Macro for Multiple-Bit CNN-Based Machine Learning.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
2013
Detection of spontaneous temporal lobe epilepsy in rats by means of 1-axis accelerometor signal.
Proceedings of the 9th International Conference on Information, 2013
2012
Use of accelerometers to detect motor states in a seizure of rats with temporal lobe epilepsy.
Proceedings of the 2012 IEEE Biomedical Circuits and Systems Conference, 2012