Paul M. Carpenter

Orcid: 0000-0002-9392-0521

Affiliations:
  • Barcelona Supercomputing Center, Spain
  • Polytechnic University of Catalonia, Barcelona, Spain (PhD)


According to our database1, Paul M. Carpenter authored at least 54 papers between 2007 and 2023.

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Bibliography

2023
Dynamic Memory Provisioning on Disaggregated HPC Systems.
Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, 2023

2022
Automatic aggregation of subtask accesses for nested OpenMP-style tasks.
Proceedings of the 2022 IEEE 34th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), 2022

Transparent load balancing of MPI programs using [email protected] and DLB.
Proceedings of the 51st International Conference on Parallel Processing, 2022

OmpSs-2@Cluster: Distributed Memory Execution of Nested OpenMP-style Tasks.
Proceedings of the Euro-Par 2022: Parallel Processing, 2022

2021
Intelligent colocation of HPC workloads.
J. Parallel Distributed Comput., 2021

Memory Demands in Disaggregated HPC: How Accurate Do We Need to Be?
Proceedings of the 2021 International Workshop on Performance Modeling, 2021

Improving HPC System Throughput and Response Time using Memory Disaggregation.
Proceedings of the 27th IEEE International Conference on Parallel and Distributed Systems, 2021

2020
Cost-aware prediction of uncorrected DRAM errors in the field.
Proceedings of the International Conference for High Performance Computing, 2020

Twig: Multi-Agent Task Management for Colocated Latency-Critical Cloud Services.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020

Contention-aware application performance prediction for disaggregated memory systems.
Proceedings of the 17th ACM International Conference on Computing Frontiers, 2020

2019
The Abstract Streaming Machine: Compile-Time Performance Modelling of Stream Programs on Heterogeneous Multiprocessors.
Trans. High Perform. Embed. Archit. Compil., 2019

PROFET: Modeling System Performance and Energy Without Simulating the CPU.
Proc. ACM Meas. Anal. Comput. Syst., 2019

Hurry-up: Scaling Web Search on Big/Little Multi-core Architectures.
CoRR, 2019

TCP proactive congestion control for east-west traffic: The marking threshold.
Comput. Networks, 2019

Continuous-Action Reinforcement Learning for Memory Allocation in Virtualized Servers.
Proceedings of the High Performance Computing, 2019

Intelligent Colocation of Workloads for Enhanced Server Efficiency.
Proceedings of the 31st International Symposium on Computer Architecture and High Performance Computing, 2019

DRAM errors in the field: a statistical approach.
Proceedings of the International Symposium on Memory Systems, 2019

SmarTmem: Intelligent Management of Transcendent Memory in a Virtualized Server.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2019

2018
PerfBound: Conserving Energy with Bounded Overheads in On/Off-Based HPC Interconnects.
IEEE Trans. Computers, 2018

Mainstream vs. Emerging HPC: Metrics, Trade-Offs and Lessons Learned.
Proceedings of the 30th International Symposium on Computer Architecture and High Performance Computing, 2018

HPC Benchmarking: Scaling Right and Looking Beyond the Average.
Proceedings of the Euro-Par 2018: Parallel Processing, 2018

2017
Energy Efficient Ethernet on MapReduce Clusters: Packet Coalescing To Improve 10GbE Links.
IEEE/ACM Trans. Netw., 2017

The Hipster Approach for Improving Cloud System Efficiency.
ACM Trans. Comput. Syst., 2017

Main Memory in HPC: Do We Need More or Could We Live with Less?
ACM Trans. Archit. Code Optim., 2017

Adaptive Runtime-Assisted Block Prefetching on Chip-Multiprocessors.
Int. J. Parallel Program., 2017

Aggregating and Managing Memory Across Computing Nodes in Cloud Environments.
Proceedings of the High Performance Computing, 2017

Interconnect Energy Savings and Lower Latency Networks in Hadoop Clusters: The Missing Link.
Proceedings of the 42nd IEEE Conference on Local Computer Networks, 2017

Sharing the instruction cache among lean cores on an asymmetric CMP for HPC applications.
Proceedings of the 2017 IEEE International Symposium on Performance Analysis of Systems and Software, 2017

vMCA: Memory Capacity Aggregation and Management in Cloud Environments.
Proceedings of the 23rd IEEE International Conference on Parallel and Distributed Systems, 2017

Hipster: Hybrid Task Manager for Latency-Critical Cloud Workloads.
Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

Paving the Way Towards a Highly Energy-Efficient and Highly Integrated Compute Node for the Exascale Revolution: The ExaNoDe Approach.
Proceedings of the Euromicro Conference on Digital System Design, 2017

RETHINK big: European roadmap for hardware anc networking optimizations for big data.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

High Throughput and Low Latency on Hadoop Clusters Using Explicit Congestion Notification: The Untold Truth.
Proceedings of the 2017 IEEE International Conference on Cluster Computing, 2017

2016
Thread Assignment in Multicore/Multithreaded Processors: A Statistical Approach.
IEEE Trans. Computers, 2016

Large-Memory Nodes for Energy Efficient High-Performance Computing.
Proceedings of the Second International Symposium on Memory Systems, 2016

Controlling Network Latency in Mixed Hadoop Clusters: Do We Need Active Queue Management?
Proceedings of the 41st IEEE Conference on Local Computer Networks, 2016

Rebalancing the core front-end through HPC code analysis.
Proceedings of the 2016 IEEE International Symposium on Workload Characterization, 2016

EUROSERVER: Share-anything scale-out micro-server design.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015
Exploring interconnect energy savings under east-west traffic pattern of mapreduce clusters.
Proceedings of the 40th IEEE Conference on Local Computer Networks, 2015

Self-Tuned Software-Managed Energy Reduction in InfiniBand Links.
Proceedings of the 21st IEEE International Conference on Parallel and Distributed Systems, 2015

Exploring multiple sleep modes in on/off based energy efficient HPC networks.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

2014
Analyzing Performance Improvements and Energy Savings in Infiniband Architecture using Network Compression.
Proceedings of the 26th IEEE International Symposium on Computer Architecture and High Performance Computing, 2014

A performance perspective on energy efficient HPC links.
Proceedings of the 2014 International Conference on Supercomputing, 2014

Software-Managed Power Reduction in Infiniband Links.
Proceedings of the 43rd International Conference on Parallel Processing, 2014

EUROSERVER: Energy Efficient Node for European Micro-Servers.
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

2013
Supercomputing with commodity CPUs: are mobile SoCs ready for HPC?
Proceedings of the International Conference for High Performance Computing, 2013

Power/performance evaluation of energy efficient Ethernet (EEE) for High Performance Computing.
Proceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems & Software, 2013

2012
Kernel Partitioning of Streaming Applications: A Statistical Approach to an NP-complete Problem.
Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012

2011
Running stream-like programs on heterogeneous multi-core systems.
PhD thesis, 2011

ACOTES Project: Advanced Compiler Technologies for Embedded Streaming.
Int. J. Parallel Program., 2011

2010
Buffer Sizing for Self-timed Stream Programs on Heterogeneous Distributed Memory Multiprocessors.
Proceedings of the High Performance Embedded Architectures and Compilers, 2010

Starsscheck: A Tool to Find Errors in Task-Based Parallel Programs.
Proceedings of the Euro-Par 2010 - Parallel Processing, 16th International Euro-Par Conference, Ischia, Italy, August 31, 2010

2009
Mapping stream programs onto heterogeneous multiprocessor systems.
Proceedings of the 2009 International Conference on Compilers, 2009

2007
A Streaming Machine Description and Programming Model.
Proceedings of the Embedded Computer Systems: Architectures, 2007


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