Jae-Sung Yoon
According to our database1,
Jae-Sung Yoon
authored at least 12 papers
between 2007 and 2024.
Collaborative distances:
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Bibliography
2024
2.4 ATOMUS: A 5nm 32TFLOPS/128TOPS ML System-on-Chip for Latency Critical Applications.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
2013
A Unified Graphics and Vision Processor With a 0.89 µW/fps Pose Estimation Engine for Augmented Reality.
IEEE Trans. Very Large Scale Integr. Syst., 2013
A 1 mJ/Frame Unified Media Application Processor With Dynamic Analog-Digital Mode Reconfiguration for Embedded 3D-Media Contents Processing.
IEEE J. Solid State Circuits, 2013
2012
A Reconfigurable Heterogeneous Multimedia Processor for IC-Stacking on Si-Interposer.
IEEE Trans. Circuits Syst. Video Technol., 2012
A 1mJ/frame unified media application processor with a 179.7pJ mixed-mode feature extraction engine for embedded 3D-media contents processing.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012
2011
A Dual-Shader 3-D Graphics Processor With Fast 4-D Vector Inner Product Units and Power-Aware Texture Cache.
IEEE Trans. Very Large Scale Integr. Syst., 2011
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
2010
A graphics and vision unified processor with 0.89µW/fps pose estimation engine for augmented reality.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
2008
A 36 fps SXGA 3-D Display Processor Embedding a Programmable 3-D Graphics Rendering Engine.
IEEE J. Solid State Circuits, 2008
A 3D graphics processor with fast 4D vector inner product units and power aware texture cache.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008
2007
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007