Sunghyun Park

According to our database, Sunghyun Park authored at least 8 papers between 2005 and 2009.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2009

A 9-Gbit/s Serial Transceiver for On-Chip Global Signaling Over Lossy Transmission Lines.

JunYoung Park, Joshua Jaeyoung Kang, Sunghyun Park, Michael P. Flynn

IEEE Trans. Circuits Syst. I Regul. Pap., 2009

A 2.5 mW 80 dB DR 36 dB SNDR 22 MS/s Logarithmic Pipeline ADC.

Jongwoo Lee, Joshua Jaeyoung Kang, Sunghyun Park, Jae-sun Seo, Jens Anders, Jorge Guilherme, Michael P. Flynn

IEEE J. Solid State Circuits, 2009

2008

A 9Gbit/s serial transceiver for on-chip global signaling over lossy transmission lines.

JunYoung Park, Joshua Jaeyoung Kang, Sunghyun Park, Michael P. Flynn

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007

A 4-GS/s 4-bit Flash ADC in 0.18-µm CMOS.

Sunghyun Park, Yorgos Palaskas, Michael P. Flynn

IEEE J. Solid State Circuits, 2007

2006

A regenerative comparator structure with integrated inductors.

Sunghyun Park, Michael P. Flynn

IEEE Trans. Circuits Syst. I Regul. Pap., 2006

A 4GS/s 4b Flash ADC in 0.18µm CMOS.

Sunghyun Park, Yorgos Palaskas, Michael P. Flynn

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

A 3.5 GS/s 5-b Flash ADC in 90 nm CMOS.

Sunghyun Park, Yorgos Palaskas, Ashoke Ravi, Ralph E. Bishop, Michael P. Flynn

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2005

Design techniques for high performance CMOS flash analog-to-digital converters.

Sunghyun Park, Michael P. Flynn

Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005