Sunghyun Park

According to our database, Sunghyun Park authored at least 13 papers between 2005 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

A Quad-Chiplet AI SoC with Full-Chip Scalable Mesh Over 16Gb/s UCIe-Advanced Die-to-Die Interface for Large-Scale AI Inferencing.

Chang-Hyo Yu, Jaewan Bae, Jinseok Kim, Hongyun Kim, Wongyu Shin, Jae-Sung Yoon, Young-Jae Jin, Jungju Oh, Jaebong Lee, Eunseo Kim, Miock Chi, Sungpill Choi, Donghan Kim, Hyunje Jo, Hyunho Kim, Hyun-Seok Heo, Hyunsung Kim, Seung-Goo Kim, Myung-Hoon Choi, Sangeun Je, Junhee Ham, Juyeong Yoon, Yashael Faith Arthanto, Sung-il Bae, Sanggyu Park, Joungwoo Lee, Heeyoung Chae, Kiljun Ryu, Yongjik Kim, Jin-O. Seo, Nara Cho, Taeyoung Jeon, Gukchae Ahn, Myoungoh Ki, Junkyeong Choi, Seungcheol Baek, Daehoon Kim, JuHwan Kim, Sungmoon Kang, Sieon Son, Minseo Kim, Yeounghwan Choe, Younggeun Lee, Sunghyun Park, Jinwook Oh

Proceedings of the IEEE International Solid-State Circuits Conference, 2026

2025

CTDM: Resource-Efficient FPGA-Accelerated Simulation of Large-Scale NPU Designs.

Hyunje Jo, Han-Sok Suh, Hyun-Seok Heo, Jinseok Kim, Hyunsung Kim, Boeui Hong, Jungju Oh, Sunghyun Park, Jinwook Oh, Sunghwan Jo, Kangwook Lee, Jae-Sun Seo

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2025

2024

2.4 ATOMUS: A 5nm 32TFLOPS/128TOPS ML System-on-Chip for Latency Critical Applications.

Chang-Hyo Yu, Hyo-Eun Kim, Sungho Shin, Kyeongryeol Bong, Hyunsuk Kim, Yoonho Boo, Jaewan Bae, Minjae Kwon, Karim Charfi, Jinseok Kim, Hongyun Kim, Myeongbo Shim, Changsoo Ha, Wongyu Shin, Jae-Sung Yoon, Miock Chi, Byungjae Lee, Sungpill Choi, Donghan Kim, Jeongseok Woo, Seokju Yoon, Hyunje Jo, Hyunho Kim, Hyun-Seok Heo, Young-Jae Jin, Jiun Yu, Jaehwan Lee, Hyunsung Kim, Minhoo Kang, Seokhyeon Choi, Seung-Goo Kim, Myung-Hoon Choi, Jungju Oh, Yunseong Kim, Haejoon Kim, Sangeun Je, Junhee Ham, Juyeong Yoon, Jaedon Lee, Seonhyeok Park, Youngseob Park, Jaebong Lee, Boeui Hong, Jaehun Ryu, Hyunseok Ko, Kwanghyun Chung, Jongho Choi, Sunwook Jung, Yashael Faith Arthanto, Jonghyeon Kim, Heejin Cho, Hyebin Jeong, Sungmin Choi, Sujin Han, Junkyu Park, Kwangbae Lee, Sung-Il Bae, Jaeho Bang, Kyeong-Jae Lee, Yeongsang Jang, Jungchul Park, Sanggyu Park, Jueon Park, Hyein Shin, Sunghyun Park, Jinwook Oh

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2023

LightTrader: A Standalone High-Frequency Trading System with Deep Learning Inference Accelerators and Proactive Scheduler.

Sungyeob Yoo, Hyunsung Kim, Jinseok Kim, Sunghyun Park, Joo-Young Kim, Jinwook Oh

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023

2022

LightTrader : World's first AI-enabled High-Frequency Trading Solution with 16 TFLOPS / 64 TOPS Deep Learning Inference Accelerators.

Hyunsung Kim, Sungyeob Yoo, Jaewan Bae, Kyeongryeol Bong, Yoonho Boo, Karim Charfi, Hyo-Eun Kim, Hyun Suk Kim, Jinseok Kim, Byungjae Lee, Jaehwan Lee, Myeongbo Shim, Sungho Shin, Jeong Seok Woo, Joo-Young Kim, Sunghyun Park, Jinwook Oh

Proceedings of the 2022 IEEE Hot Chips 34 Symposium, 2022

2009

A 9-Gbit/s Serial Transceiver for On-Chip Global Signaling Over Lossy Transmission Lines.

JunYoung Park, Joshua Jaeyoung Kang, Sunghyun Park, Michael P. Flynn

IEEE Trans. Circuits Syst. I Regul. Pap., 2009

A 2.5 mW 80 dB DR 36 dB SNDR 22 MS/s Logarithmic Pipeline ADC.

Jongwoo Lee, Joshua Jaeyoung Kang, Sunghyun Park, Jae-sun Seo, Jens Anders, Jorge Guilherme, Michael P. Flynn

IEEE J. Solid State Circuits, 2009

2008

A 9Gbit/s serial transceiver for on-chip global signaling over lossy transmission lines.

JunYoung Park, Joshua Jaeyoung Kang, Sunghyun Park, Michael P. Flynn

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007

A 4-GS/s 4-bit Flash ADC in 0.18-µm CMOS.

Sunghyun Park, Yorgos Palaskas, Michael P. Flynn

IEEE J. Solid State Circuits, 2007

2006

A regenerative comparator structure with integrated inductors.

Sunghyun Park, Michael P. Flynn

IEEE Trans. Circuits Syst. I Regul. Pap., 2006

A 4GS/s 4b Flash ADC in 0.18µm CMOS.

Sunghyun Park, Yorgos Palaskas, Michael P. Flynn

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

A 3.5 GS/s 5-b Flash ADC in 90 nm CMOS.

Sunghyun Park, Yorgos Palaskas, Ashoke Ravi, Ralph E. Bishop, Michael P. Flynn

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2005

Design techniques for high performance CMOS flash analog-to-digital converters.

Sunghyun Park, Michael P. Flynn

Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005