Jason Hiser

According to our database1, Jason Hiser
  • authored at least 46 papers between 2000 and 2018.
  • has a "Dijkstra number"2 of three.

Timeline

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Bibliography

2018
Xandra: An Autonomous Cyber Battle System for the Cyber Grand Challenge.
IEEE Security & Privacy, 2018

2017
Securing Binary Code.
IEEE Security & Privacy, 2017

Zipr: Efficient Static Binary Rewriting for Security.
Proceedings of the 47th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2017

Mixr: Flexible Runtime Rerandomization for Binaries.
Proceedings of the 2017 Workshop on Moving Target Defense, 2017

Online control adaptation for safe and secure autonomous vehicle operations.
Proceedings of the 2017 NASA/ESA Conference on Adaptive Hardware and Systems, 2017

2016
Diversity in Cybersecurity.
IEEE Computer, 2016

A System for the Security Protection of Embedded Binary Programs.
Proceedings of the 46th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops, 2016

Dynamic Canary Randomization for Improved Software Security.
Proceedings of the 11th Annual Cyber and Information Security Research Conference, 2016

Double Helix and RAVEN: A System for Cyber Fault Tolerance and Recovery.
Proceedings of the 11th Annual Cyber and Information Security Research Conference, 2016

2015
Matryoshka: Strengthening Software Protection via Nested Virtual Machines.
Proceedings of the 1st IEEE/ACM International Workshop on Software Protection, 2015

Joza: Hybrid Taint Inference for Defeating Web Application SQL Injection Attacks.
Proceedings of the 45th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2015

2014
What's the PointiSA?
Proceedings of the ACM Information Hiding and Multimedia Security Workshop, 2014

To B or not to B: Blessing OS Commands with Software DNA Shotgun Sequencing.
Proceedings of the 2014 Tenth European Dependable Computing Conference, 2014

A Framework for Creating Binary Rewriting Tools (Short Paper).
Proceedings of the 2014 Tenth European Dependable Computing Conference, 2014

2013
Moving Target Defenses in the Helix Self-Regenerative Architecture.
Proceedings of the Moving Target Defense II, 2013

Software protection for dynamically-generated code.
Proceedings of the 2nd ACM SIGPLAN Program Protection and Reverse Engineering Workshop 2013, 2013

2012
Enabling dynamic binary translation in embedded systems with scratchpad memory.
ACM Trans. Embedded Comput. Syst., 2012

Replacement attacks against VM-protected applications.
Proceedings of the 8th International Conference on Virtual Execution Environments, 2012

ILR: Where'd My Gadgets Go?
Proceedings of the IEEE Symposium on Security and Privacy, 2012

Defense against Stack-Based Attacks Using Speculative Stack Layout Transformation.
Proceedings of the Runtime Verification, Third International Conference, 2012

2011
Evaluating indirect branch handling mechanisms in software dynamic translation systems.
TACO, 2011

PEASOUP: preventing exploits against software of uncertain provenance (position paper).
Proceedings of the 7th International Workshop on Software Engineering for Secure Systems, 2011

Component-Oriented Monitoring of Binaries for Security.
Proceedings of the 44th Hawaii International International Conference on Systems Science (HICSS-44 2011), 2011

2010
A Secure and Robust Approach to Software Tamper Resistance.
Proceedings of the Information Hiding - 12th International Conference, 2010

On the effectiveness of the metamorphic shield.
Proceedings of the Software Architecture, 4th European Conference, 2010

2009
Security through Diversity: Leveraging Virtual Machine Technology.
IEEE Security & Privacy, 2009

Addressing the challenges of DBT for the ARM architecture.
Proceedings of the 2009 ACM SIGPLAN/SIGBED conference on Languages, 2009

MEDS: The Memory Error Detection System.
Proceedings of the Engineering Secure Software and Systems, 2009

Using program metadata to support SDT in object-oriented applications.
Proceedings of the 4th workshop on the Implementation, 2009

2008
Reducing pressure in bounded DBT code caches.
Proceedings of the 2008 International Conference on Compilers, 2008

2007
Fast, accurate design space exploration of embedded systems memory configurations.
Proceedings of the 2007 ACM Symposium on Applied Computing (SAC), 2007

Virtual Execution Environments: Support and Tools.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

Evaluating Indirect Branch Handling Mechanisms in Software Dynamic Translation Systems.
Proceedings of the Fifth International Symposium on Code Generation and Optimization (CGO 2007), 2007

Fragment cache management for dynamic binary translators in embedded systems with scratchpad.
Proceedings of the 2007 International Conference on Compilers, 2007

2006
VISTA: VPO interactive system for tuning applications.
ACM Trans. Embedded Comput. Syst., 2006

Secure and practical defense against code-injection attacks using software dynamic translation.
Proceedings of the 2nd International Conference on Virtual Execution Environments, 2006

Evaluating fragment construction policies for SDT systems.
Proceedings of the 2nd International Conference on Virtual Execution Environments, 2006

Techniques and tools for dynamic optimization.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

On the Use of Compilers in DSP Laboratory Instruction.
Proceedings of the 2006 IEEE International Conference on Acoustics Speech and Signal Processing, 2006

2005
Fast and efficient searches for effective optimization-phase sequences.
TACO, 2005

2004
Fast searches for effective optimization phase sequences.
Proceedings of the ACM SIGPLAN 2004 Conference on Programming Language Design and Implementation 2004, 2004

EMBARC: an efficient memory bank assignment algorithm for retargetable compilers.
Proceedings of the 2004 ACM SIGPLAN/SIGBED Conference on Languages, 2004

2003
Code Generation for a Dual Instruction Set Processor Based on Selective Code Transformation.
Proceedings of the Software and Compilers for Embedded Systems, 7th International Workshop, 2003

2002
VISTA: a system for interactive code improvement.
Proceedings of the 2002 Joint Conference on Languages, 2002

2000
Register Assignment for Software Pipelining with Partitioned Register Banks.
Proceedings of the 14th International Parallel & Distributed Processing Symposium (IPDPS'00), 2000

Global Register Partitioning.
Proceedings of the 2000 International Conference on Parallel Architectures and Compilation Techniques (PACT'00), 2000


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