Bruce R. Childers

Panos K. Chrysanthis

Proceedings of the 34th IEEE International Conference on Data Engineering, 2018

Occam: Software Environment for Creating Reproducible Research.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE International Conference on e-Science, 2018

CMH: compression management for improving capacity in the hybrid memory cube.

[BibT_eX]

[DOI]

Proceedings of the 15th ACM International Conference on Computing Frontiers, 2018

2017

On the Restore Time Variations of Future DRAM Memory.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2017

Quality of Service Support for Fine-Grained Sharing on GPUs.

[BibT_eX]

[DOI]

Proceedings of the 44th Annual International Symposium on Computer Architecture, 2017

Artifact Evaluation: Is It a Real Incentive?

[BibT_eX]

[DOI]

Panos K. Chrysanthis

Proceedings of the 13th IEEE International Conference on e-Science, 2017

DrMP: Mixed Precision-Aware DRAM for High Performance Approximate and Precise Computing.

[BibT_eX]

[DOI]

Proceedings of the 26th International Conference on Parallel Architectures and Compilation Techniques, 2017

2016

Symmetry-Agnostic Coordinated Management of the Memory Hierarchy in Multicore Systems.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2016

Asteroid: Scalable Online Memory Diagnostics for Multi-core, Multi-socket Servers.

[BibT_eX]

[DOI]

Int. J. Parallel Program., 2016

Simultaneous Multikernel: Fine-Grained Sharing of GPUs.

[BibT_eX]

[DOI]

IEEE Comput. Archit. Lett., 2016

Live code update for IoT devices in energy harvesting environments.

[BibT_eX]

[DOI]

Proceedings of the 5th Non-Volatile Memory Systems and Applications Symposium, 2016

AWARD: Approximation-aWAre Restore in Further Scaling DRAM.

[BibT_eX]

[DOI]

Proceedings of the Second International Symposium on Memory Systems, 2016

Concurrent Migration of Multiple Pages in software-managed hybrid main memory.

[BibT_eX]

[DOI]

Proceedings of the 34th IEEE International Conference on Computer Design, 2016

Restore truncation for performance improvement in future DRAM systems.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016

Simultaneous Multikernel GPU: Multi-tasking throughput processors via fine-grained sharing.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016

2015

A Roadmap and Plan of Action for Community-Supported Empirical Evaluation in Computer Architecture.

[BibT_eX]

[DOI]

Alex K. Jones

ACM SIGOPS Oper. Syst. Rev., 2015

Artifact Evaluation for Publications (Dagstuhl Perspectives Workshop 15452).

[BibT_eX]

[DOI]

Grigori Fursin

Shriram Krishnamurthi

Andreas Zeller

Dagstuhl Reports, 2015

Stream query processing on emerging memory architectures.

[BibT_eX]

[DOI]

Alexandros Labrinidis

Proceedings of the IEEE Non-Volatile Memory System and Applications Symposium, 2015

HMMSim: a simulator for hardware-software co-design of hybrid main memory.

[BibT_eX]

[DOI]

Proceedings of the IEEE Non-Volatile Memory System and Applications Symposium, 2015

Implications of Memory Interference for Composed HPC Applications.

[BibT_eX]

[DOI]

Proceedings of the 2015 International Symposium on Memory Systems, 2015

Achieving Yield, Density and Performance Effective DRAM at Extreme Technology Sizes.

[BibT_eX]

[DOI]

Jun Yang

Youtao Zhang

Proceedings of the 2015 International Symposium on Memory Systems, 2015

Characterizing the Overhead of Software-Managed Hybrid Main Memory.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE International Symposium on Modeling, 2015

Performance Modeling of Multithreaded Programs for Mobile Asymmetric Chip Multiprocessors.

[BibT_eX]

[DOI]

Jingling Xue

Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015

Supporting superpages in non-contiguous physical memory.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015

Exploiting DRAM restore time variations in deep sub-micron scaling.

[BibT_eX]

[DOI]

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Asteroid: scalable online memory diagnostics.

[BibT_eX]

[DOI]

Proceedings of the 12th ACM International Conference on Computing Frontiers, 2015

Understanding the limiting factors of page migration in hybrid main memory.

[BibT_eX]

[DOI]

Proceedings of the 12th ACM International Conference on Computing Frontiers, 2015

2014

Building and using application utility models to dynamically choose thread counts.

[BibT_eX]

[DOI]

J. Supercomput., 2014

COMeT+: Continuous Online Memory Testing with Multi-Threading Extension.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2014

Program affinity performance models for performance and utilization.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Concurrent page migration for mobile systems with OS-managed hybrid memory.

[BibT_eX]

[DOI]

Proceedings of the Computing Frontiers Conference, CF'14, 2014

2013

Hardware-Assisted Cooperative Integration of Wear-Leveling and Salvaging for Phase Change Memory.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2013

Delta-compressed caching for overcoming the write bandwidth limitation of hybrid main memory.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2013

Bit mapping for balanced PCM cell programming.

[BibT_eX]

[DOI]

Proceedings of the 40th Annual International Symposium on Computer Architecture, 2013

Automatic Generation of Program Affinity Policies Using Machine Learning.

[BibT_eX]

[DOI]

Proceedings of the Compiler Construction - 22nd International Conference, 2013

Writeback-aware bandwidth partitioning for multi-core systems with PCM.

[BibT_eX]

[DOI]

Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques, 2013

2012

Enabling dynamic binary translation in embedded systems with scratchpad memory.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2012

Writeback-aware partitioning and replacement for last-level caches in phase change main memory systems.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2012

REEact: a customizable virtual execution manager for multicore platforms.

[BibT_eX]

[DOI]

Proceedings of the 8th International Conference on Virtual Execution Environments, 2012

FPB: Fine-grained Power Budgeting to Improve Write Throughput of Multi-level Cell Phase Change Memory.

[BibT_eX]

[DOI]

Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012

Using utility prediction models to dynamically choose program thread counts.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems & Software, 2012

Improving write operations in MLC phase change memory.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE International Symposium on High Performance Computer Architecture, 2012

2011

DEFCAM: A design and evaluation framework for defect-tolerant cache memories.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2011

Evaluating indirect branch handling mechanisms in software dynamic translation systems.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2011

Real-Time Scheduling for Phase Change Main Memory Systems.

[BibT_eX]

[DOI]

Miao Zhou

Santiago Bock

Rami G. Melhem

Proceedings of the IEEE 10th International Conference on Trust, 2011

COMeT: Continuous Online Memory Test.

[BibT_eX]

[DOI]

Proceedings of the 17th IEEE Pacific Rim International Symposium on Dependable Computing, 2011

Jazz2: a flexible and extensible framework for structural testing in a Java VM.

[BibT_eX]

[DOI]

Jonathan Misurda

Proceedings of the 9th International Conference on Principles and Practice of Programming in Java, 2011

Analyzing the impact of useless write-backs on the endurance and energy consumption of PCM main memory.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2011

Inflation and deflation of self-adaptive applications.

[BibT_eX]

[DOI]

Proceedings of the 2011 ICSE Symposium on Software Engineering for Adaptive and Self-Managing Systems, 2011

CloudCache: Expanding and shrinking private caches.

[BibT_eX]

[DOI]

Proceedings of the 17th International Conference on High-Performance Computer Architecture (HPCA-17 2011), 2011

LLS: Cooperative integration of wear-leveling and salvaging for PCM main memory.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE/IFIP International Conference on Dependable Systems and Networks, 2011

Impact of process variation on endurance algorithms for wear-prone memories.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2011

Demand code paging for NAND flash in MMU-less embedded systems.

[BibT_eX]

[DOI]

José Baiocchi

Proceedings of the Design, Automation and Test in Europe, 2011

2010

Detecting bugs in register allocation.

[BibT_eX]

[DOI]

Yuqiang Huang

ACM Trans. Program. Lang. Syst., 2010

PERFECTORY: A Fault-Tolerant Directory Memory Architecture.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2010

StealthWorks: Emulating Memory Errors.

[BibT_eX]

[DOI]

Proceedings of the Runtime Verification - First International Conference, 2010

Using PCM in Next-generation Embedded Space Applications.

[BibT_eX]

[DOI]

Proceedings of the 16th IEEE Real-Time and Embedded Technology and Applications Symposium, 2010

StimulusCache: Boosting performance of chip multiprocessors with excess cache.

[BibT_eX]

[DOI]

Proceedings of the 16th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 2010

Increasing PCM main memory lifetime.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2010

2009

Addressing the challenges of DBT for the ARM architecture.

[BibT_eX]

[DOI]

Proceedings of the 2009 ACM SIGPLAN/SIGBED conference on Languages, 2009

Network I/O Extensibility without Administrator Privilege.

[BibT_eX]

[DOI]

Takashi Okumura

Proceedings of the Fifth International Conference on Autonomic and Autonomous Systems, 2009

MCP: An Energy-Efficient Code Distribution Protocol for Multi-Application WSNs.

[BibT_eX]

[DOI]

Weijia Li

Youtao Zhang

Proceedings of the Distributed Computing in Sensor Systems, 2009

Heterogeneous code cache: using scratchpad and main memory in dynamic binary translators.

[BibT_eX]

[DOI]

José Baiocchi

Proceedings of the 46th Design Automation Conference, 2009

Transparent Debugging of Dynamically Optimized Code.

[BibT_eX]

[DOI]

Proceedings of the CGO 2009, 2009

A Framework for Exploring Optimization Properties.

[BibT_eX]

[DOI]

Proceedings of the Compiler Construction, 18th International Conference, 2009

2008

Preface.

[BibT_eX]

[DOI]

Mahmut T. Kandemir

Comput. Lang. Syst. Struct., 2008

Running a Java VM inside an operating system kernel.

[BibT_eX]

[DOI]

Takashi Okumura

Proceedings of the 4th International Conference on Virtual Execution Environments, 2008

Integrated CPU Cache Power Management in Multiple Clock Domain Processors.

[BibT_eX]

[DOI]

Proceedings of the High Performance Embedded Architectures and Compilers, 2008

Adaptive Buffer Management for Efficient Code Dissemination in Multi-Application Wireless Sensor Networks.

[BibT_eX]

[DOI]

Proceedings of the 2008 IEEE/IPIP International Conference on Embedded and Ubiquitous Computing (EUC 2008), 2008

08441 Abstracts Collection - Emerging Uses and Paradigms for Dynamic Binary Translation.

[BibT_eX]

[DOI]

Proceedings of the Emerging Uses and Paradigms for Dynamic Binary Translation, 26.10., 2008

08441 Final Report - Emerging Uses and Paradigms for Dynamic Binary Translation.

[BibT_eX]

[DOI]

Proceedings of the Emerging Uses and Paradigms for Dynamic Binary Translation, 26.10., 2008

Reducing pressure in bounded DBT code caches.

[BibT_eX]

[DOI]

Proceedings of the 2008 International Conference on Compilers, 2008

2007

Power Aware Mapping of Real-Time Tasks to Multiprocessors.

[BibT_eX]

[DOI]

Proceedings of the Handbook of Parallel Computing - Models, Algorithms and Applications., 2007

Near-Memory Caching for Improved Energy Consumption.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2007

Limits for a feasible speculative trace reuse implementation.

[BibT_eX]

[DOI]

Maurício L. Pilla

Felipe Maia Galvão França

Amarildo T. da Costa

Philippe Olivier Alexandre Navaux

Int. J. High Perform. Syst. Archit., 2007

Power management in external memory using PA-CDRAM.

[BibT_eX]

[DOI]

Int. J. Embed. Syst., 2007

Integrated CPU and l2 cache voltage scaling using machine learning.

[BibT_eX]

[DOI]

Nevine AbouGhazaleh

Proceedings of the 2007 ACM SIGPLAN/SIGBED Conference on Languages, 2007

Performance of Graceful Degradation for Cache Faults.

[BibT_eX]

[DOI]

Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007

Virtual Execution Environments: Support and Tools.

[BibT_eX]

[DOI]

Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

Exploring the interplay of yield, area, and performance in processor caches.

[BibT_eX]

[DOI]

Proceedings of the 25th International Conference on Computer Design, 2007

Fragment cache management for dynamic binary translators in embedded systems with scratchpad.

[BibT_eX]

[DOI]

Proceedings of the 2007 International Conference on Compilers, 2007

2006

Collaborative operating system and compiler power management for real-time applications.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2006

An approach toward profit-driven optimization.

[BibT_eX]

[DOI]

Philippe Olivier Alexandre Navaux

ACM Trans. Archit. Code Optim., 2006

Evaluating fragment construction policies for SDT systems.

[BibT_eX]

[DOI]

Proceedings of the 2nd International Conference on Virtual Execution Environments, 2006

A Speculative Trace Reuse Architecture with Reduced Hardware Requirements.

[BibT_eX]

[DOI]

Proceedings of the 18th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2006), 2006

Catching and Identifying Bugs in Register Allocation.

[BibT_eX]

[DOI]

Yuqiang Huang

Proceedings of the Static Analysis, 13th International Symposium, 2006

Techniques and tools for dynamic optimization.

[BibT_eX]

[DOI]

Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

2005

An infrastructure for designing custom embedded wide counterflow pipelines.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2005

Compile-Time Planning for Overhead Reduction in Software Dynamic Translators.

[BibT_eX]

[DOI]

Int. J. Parallel Program., 2005

Planning for code buffer management in distributed virtual execution environments.

[BibT_eX]

[DOI]

Shukang Zhou

Proceedings of the 1st International Conference on Virtual Execution Environments, 2005

Low overhead program monitoring and profiling.

[BibT_eX]

[DOI]

Proceedings of the 2005 ACM SIGPLAN-SIGSOFT Workshop on Program Analysis For Software Tools and Engineering, 2005

Demand-driven structural testing with dynamic instrumentation.

[BibT_eX]

[DOI]

Proceedings of the 27th International Conference on Software Engineering (ICSE 2005), 2005

Energy Conservation in Memory Hierarchies using Power-Aware Cached-DRAM.

[BibT_eX]

[DOI]

Proceedings of the Power-aware Computing Systems, 3.-8. April 2005, 2005

Model-Based Framework: An Approach for Profit-Driven Optimization.

[BibT_eX]

[DOI]

Proceedings of the 3nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2005), 2005

Jazz: A Tool for Demand-Driven Structural Testing.

[BibT_eX]

[DOI]

Proceedings of the Compiler Construction, 14th International Conference, 2005

Tdb: a source-level debugger for dynamically translated programs.

[BibT_eX]

[DOI]

Proceedings of the Sixth International Workshop on Automated Debugging, 2005

2004

Custom Wide Counterflow Pipelines for High-Performance Embedded Applications.

[BibT_eX]

[DOI]

Philippe Olivier Alexandre Navaux

IEEE Trans. Computers, 2004

Instrumentation in software dynamic translators for self-managed systems.

[BibT_eX]

[DOI]

Proceedings of the 1st ACM SIGSOFT Workshop on Self-Managed Systems, 2004

Value Predictors for Reuse through Speculation on Traces.

[BibT_eX]

[DOI]

Maurício L. Pilla

Felipe Maia Galvão França

Amarildo T. da Costa

Proceedings of the 16th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2004), 2004

Overhead Reduction Techniques for Software Dynamic Translation.

[BibT_eX]

[DOI]

Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

Profile Guided Management of Code Partitions for Embedded Systems.

[BibT_eX]

[DOI]

Shukang Zhou

Proceedings of the 2004 Design, 2004

Compact Binaries with Code Compression in a Software Dynamic Translator.

[BibT_eX]

[DOI]

Stacey Shogan

Proceedings of the 2004 Design, 2004

2003

Scheduling with Dynamic Voltage/Speed Adjustment Using Slack Reclamation in Multiprocessor Real-Time Systems.

[BibT_eX]

[DOI]

Dakai Zhu

Rami G. Melhem

IEEE Trans. Parallel Distributed Syst., 2003

The Limits of Speculative Trace Reuse on Deeply Pipelined Processors.

[BibT_eX]

[DOI]

Proceedings of the 15th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2003), 2003

Collaborative Operating System and Compiler Power Management for Real-Time Applications.

[BibT_eX]

[DOI]

Proceedings of the 9th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2003), 2003

SoftTest: a framework for software testing of Java programs.

[BibT_eX]

[DOI]

Proceedings of the 2003 OOPSLA Workshop on Eclipse Technology eXchange, 2003

Short Courses in System-on-a-Chip (SoC) Design.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Conference on Microelectronics Systems Education, 2003

Predicting the impact of optimizations for embedded systems.

[BibT_eX]

[DOI]

Proceedings of the 2003 Conference on Languages, 2003

Energy management for real-time embedded applications with compiler support.

[BibT_eX]

[DOI]

Proceedings of the 2003 Conference on Languages, 2003

Continuous Compilation: A New Approach to Aggressive and Adaptive Code Transformation.

[BibT_eX]

[DOI]

Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

Retargetable and Reconfigurable Software Dynamic Translation.

[BibT_eX]

[DOI]

Proceedings of the 1st IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2003), 2003

2001

Message from the Guest Editors.

[BibT_eX]

[DOI]

Ali R. Hurson

IEEE Trans. Computers, 2001

Scheduling with Dynamic Voltage/Speed Adjustment Using Slack Reclamation in Multi-Processor Real-Time Systems.

[BibT_eX]

[DOI]

Dakai Zhu

Rami G. Melhem

Proceedings of the 22nd IEEE Real-Time Systems Symposium (RTSS 2001), 2001

2000

Reordering Memory Bus Transactions for Reduced Power Consumption.

[BibT_eX]

[DOI]

Tarun Nakra

Proceedings of the Languages, 2000

An Infrastructure for Designing Custom Embedded Counter-flow Pipelines.

[BibT_eX]

[DOI]

Proceedings of the 33rd Annual Hawaii International Conference on System Sciences (HICSS-33), 2000

1999

Architectural Considerations for Application-Specific Counterflow Pipelines.

[BibT_eX]

[DOI]

Proceedings of the 18th Conference on Advanced Research in VLSI (ARVLSI '99), 1999

1998

The Design of EzWindows: A Graphics API for an Introductory Programming Course

[BibT_eX]

[DOI]

CoRR, 1998

A Design Environment for Counterflow Pipeline Synthesis.

[BibT_eX]

[DOI]