Jean-Luc Béchennec
Orcid: 0000-0002-3763-8417
According to our database1,
Jean-Luc Béchennec
authored at least 55 papers
between 1987 and 2024.
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Bibliography
2024
SCHEMATIC: Compile-Time Checkpoint Placement and Memory Allocation for Intermittent Systems.
Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2024
2023
Softw. Qual. J., June, 2023
Discret. Event Dyn. Syst., March, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
2022
Proceedings of the Formal Methods and Software Engineering, 2022
High-level Colored Time Petri Nets for true concurrency modeling in real-time software.
Proceedings of the 8th International Conference on Control, 2022
2021
Proceedings of the RTNS'2021: 29th International Conference on Real-Time Networks and Systems, 2021
Proceedings of the AM '21: Audio Mostly 2021, 2021
2020
Requirement specification and model-checking of a real-time scheduler implementation.
Proceedings of the 28th International Conference on Real Time Networks and Systems, 2020
2019
Proceedings of the 19th International Conference on Application of Concurrency to System Design, 2019
2018
Proceedings of the 26th International Conference on Real-Time Networks and Systems, 2018
Proceedings of the 14th European Dependable Computing Conference, 2018
Proceedings of the 5th International Conference on Control, 2018
Proceedings of the 2018 NASA/ESA Conference on Adaptive Hardware and Systems, 2018
2017
ACM Trans. Embed. Comput. Syst., 2017
Proceedings of the Verification and Evaluation of Computer and Communication Systems, 2017
2016
Proceedings of the 16th International Workshop on Worst-Case Execution Time Analysis, 2016
Proceedings of the 11th IEEE Symposium on Industrial Embedded Systems, 2016
Proceedings of the 11th IEEE Symposium on Industrial Embedded Systems, 2016
2015
ACM Trans. Embed. Comput. Syst., 2015
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015
2014
Improving processor hardware compiled cycle accurate simulation using program abstraction.
Proceedings of the 7th International ICST Conference on Simulation Tools and Techniques, 2014
Proceedings of the 4th International Conference On Simulation And Modeling Methodologies, 2014
2013
Proceedings of 2013 IEEE 18th Conference on Emerging Technologies & Factory Automation, 2013
Proceedings of the 13th International Conference on Application of Concurrency to System Design, 2013
2012
Harmless, a hardware architecture description language dedicated to real-time embedded system simulation.
J. Syst. Archit., 2012
Proceedings of the 14th IEEE International Conference on High Performance Computing and Communication & 9th IEEE International Conference on Embedded Software and Systems, 2012
2011
Electron. Commun. Eur. Assoc. Softw. Sci. Technol., 2011
Extending Harmless architecture description language for embedded real-time systems validation.
Proceedings of the Industrial Embedded Systems (SIES), 2011
2010
ViPER: a lightweight approach to the simulation of distributed and embedded software.
Proceedings of the 3rd International Conference on Simulation Tools and Techniques, 2010
2009
Instruction set simulator generation using HARMLESS, a new hardware architecture description language.
Proceedings of the 2nd International Conference on Simulation Tools and Techniques for Communications, 2009
2008
Proceedings of the International Multiconference on Computer Science and Information Technology, 2008
2006
Proceedings of 11th IEEE International Conference on Emerging Technologies and Factory Automation, 2006
2002
J. Syst. Archit., 2002
2000
Proceedings of the Sixth International Symposium on High-Performance Computer Architecture, 2000
1999
Two Schemes to Improve the Performance of a <i>Sort-Last</i> 3D Parallel Rendering Machine with Texture Caches.
Proceedings of the Euro-Par '99 Parallel Processing, 5th International Euro-Par Conference, Toulouse, France, August 31, 1999
Proceedings of the Euro-Par '99 Parallel Processing, 5th International Euro-Par Conference, Toulouse, France, August 31, 1999
Proceedings of the Euro-Par '99 Parallel Processing, 5th International Euro-Par Conference, Toulouse, France, August 31, 1999
1998
ASF: a teaching and rsearch object-oriented simulation tool for computer architecture design and performance evaluation.
Proceedings of the 1998 workshop on Computer architecture education, 1998
Proceedings of the 12th international conference on Supercomputing, 1998
1997
Performance evaluation of the memory hierarchy of a desktop PC using commodity chips with specific traces.
Proceedings of the 23rd EUROMICRO Conference '97, 1997
1993
Microprocess. Microprogramming, 1993
J. Parallel Distributed Comput., 1993
Proceedings of the 1993 Euromicro Workshop on Parallel and Distributed Processing, 1993
A Parralel Architecture Based on Compiled Communication Schemes.
Proceedings of the Parallel Computing: Trends and Applications, 1993
Proceedings of the 1993 International Conference on Parallel Processing, 1993
1992
Microprocess. Microprogramming, 1992
Proceedings of the PARLE '92: Parallel Architectures and Languages Europe, 1992
1991
Microprocessing and Microprogramming, 1991
1990
Microprocessing and Microprogramming, 1990
1988
Proceedings of the Computer Design: VLSI in Computers and Processors, 1988
1987
Proceedings of the Database Machines and Knowledge Base Machines, 1987