Jie Guo

Orcid: 0000-0002-5256-9499

Affiliations:
  • University of Pittsburgh, Department of Electrical and Computer Engineering, PA, USA


According to our database1, Jie Guo authored at least 12 papers between 2013 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2018
Improving Write Performance and Extending Endurance of Object-Based NAND Flash Devices.
ACM Trans. Embed. Comput. Syst., 2018

An ECC-Free MLC STT-RAM Based Approximate Memory Design for Multimedia Applications.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

2017
Data-Pattern-Aware Error Prevention Technique to Improve System Reliability.
IEEE Trans. Very Large Scale Integr. Syst., 2017

FlexLevel NAND Flash Storage System Design to Reduce LDPC Latency.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Extending the lifetime of object-based NAND flash device with STT-RAM/DRAM hybrid buffer.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016
Objnandsim: object-based NAND flash device simulator.
Proceedings of the 5th Non-Volatile Memory Systems and Applications Symposium, 2016

A design to reduce write amplification in object-based NAND flash devices.
Proceedings of the Eleventh IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2016

2015
FlexLevel: a novel NAND flash storage system design for LDPC latency reduction.
Proceedings of the 52nd Annual Design Automation Conference, 2015

2014
Reduction of data prevention cost and improvement of reliability in MLC NAND flash storage system.
Proceedings of the International Conference on Computing, Networking and Communications, 2014

DPA: A data pattern aware error prevention technique for NAND flash lifetime extension.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2013
Low cost power failure protection for MLC NAND flash storage systems with PRAM/DRAM hybrid buffer.
Proceedings of the Design, Automation and Test in Europe, 2013

DA-RAID-5: a disturb aware data protection technique for NAND flash storage systems.
Proceedings of the Design, Automation and Test in Europe, 2013


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