Jieming Qi

According to our database, Jieming Qi authored at least 3 papers between 2006 and 2012.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2012

A 16-Gb/s Backplane Transceiver With 12-Tap Current Integrating DFE and Dynamic Adaptation of Voltage Offset and Timing Drifts in 45-nm SOI CMOS Technology.

Gautam R. Gangasani, Chun-Ming Hsu, John F. Bulzacchelli, Sergey V. Rylov, Troy J. Beukema, David Freitas, William Kelly, Michael Shannon, Jieming Qi, Hui H. Xu, Joseph Natonio, Todd M. Rasmus, Jong-Ru Guo, Michael Wielgos, Jon Garlett, Michael Sorna, Mounir Meghelli

IEEE J. Solid State Circuits, 2012

2006

A Circuit for Reducing Large Transient Current Effects on Processor Power Grids.

Eskinder Hailu, David W. Boerstler, Kazuhiko Miki, Jieming Qi, Michael Wang, Mack W. Riley

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

A new test and characterization scheme for 10+ GHz low jitter wide band PLL.

Kazuhiko Miki, David Boerstler, Eskinder Hailu, Jieming Qi, Sarah Pettengill, Yuichi Goto

Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006