Jong-Ru Guo

According to our database1, Jong-Ru Guo authored at least 18 papers between 2002 and 2015.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2015
High-Speed Reconfigurable Circuits for Multirate Systems in SiGe HBT Technology.
Proc. IEEE, 2015

2012
A 16-Gb/s Backplane Transceiver With 12-Tap Current Integrating DFE and Dynamic Adaptation of Voltage Offset and Timing Drifts in 45-nm SOI CMOS Technology.
IEEE J. Solid State Circuits, 2012

2007
A 12-Gb/s DEMUX Implemented With SiGe High-Speed FPGA Circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2007

Silicon germanium programmable circuits for gigahertz applications.
IET Circuits Devices Syst., 2007

2005
A 5-10GHz SiGe BiCMOS FPGA with new configurable logic block.
Microprocess. Microsystems, 2005

Multi-ghz Sige Bicmos Fpgas with New Architecture and Novel Power Management Techniques.
J. Circuits Syst. Comput., 2005

A 10 GHz 4: 1 MUX and 1: 4 DEMUX implemented by a Gigahertz SiGe FPGA for fast ADC.
Integr., 2005

A High Speed Reconfigurable Gate Array for Gigahertz Applications.
Proceedings of the 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), 2005

A 11 GHz FPGA with Test Applications.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

2004
The 10GHz 4: 1 MUX and 1: 4 DEMUX implemented via the gigahertz SiGe FPGA.
Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004

The gigahertz FPGA: design consideration and applications.
Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, 2004

2003
A 5-20 GHz, low power FPGA implemented by SiGe HBT BiCMOS technology.
Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, 2003

Gigahertz FPGA by SiGe BiCMOS Technology for Low Power, High Speed Computing with 3-D Memory.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

A four-bit full adder implemented on fast SiGe FPGAs with novel power control scheme.
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2003

A scalable 2 V, 20 GHz FPGA using SiGe HBT BiCMOS technology.
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2003

A Novel Multi-Speed, Power Saving Architecture for SiGe HBT FPGA.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, June 23, 2003

2002
Gigahertz SiGe BiCMOS FPGAs with new architectures and novel power management schemes.
Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, 2002

Fast SiGe HBT BiCMOS FPGAs with New Architecture and Power Saving Techniques.
Proceedings of the Field-Programmable Logic and Applications, 2002


  Loading...