Mack W. Riley

According to our database, Mack W. Riley authored at least 10 papers between 2005 and 2008.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2008

Migration of Cell Broadband Engine from 65nm SOI to 45nm SOI.

Osamu Takahashi, Chad Adams, D. Ault, Erwin Behnen, O. Chiang, Scott R. Cottier, Paula K. Coulman, James Culp, Gilles Gervais, M. S. Gray, Y. Itaka, C. J. Johnson, Fumihiro Kono, L. Maurice, Kevin W. McCullen, Lam Nguyen, Y. Nishino, Hiromi Noro, Jürgen Pille, Mack W. Riley, M. Shen, Chiaki Takano, Shunsako Tokito, Tina Wagner, Hiroshi Yoshihara

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2007

Cell Broadband Engine processor: Design and implementation.

Mack W. Riley, James D. Warnock, Dieter F. Wendel

IBM J. Res. Dev., 2007

Cell Broadband Engine Debugging for Unknown Events.

Mack W. Riley, Mike Genden

IEEE Des. Test Comput., 2007

Implementation of the 65nm Cell Broadband Engine.

Mack W. Riley, Brian K. Flachs, Sang H. Dhong, Gilles Gervais, Steve Weitzel, Michael Wang, David Boerstler, Mark Bolliger, John M. Keaty, Jürgen Pille, R. Berry, Osamu Takahashi, Y. Nishino, T. Uchino

Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006

Overview of the architecture, circuit design, and physical implementation of a first-generation cell processor.

Dac C. Pham, Tony Aipperspach, David Boerstler, Mark Bolliger, Rajat Chaudhry, Dennis Cox, Paul E. Harvey, H. Peter Hofstee, Charles R. Johns, Jim Kahle, Atsushi Kameyama, John M. Keaty, Yoshio Masubuchi, Mydung Pham, Jürgen Pille, Stephen D. Posluszny, Mack W. Riley, Daniel L. Stasiak, Masakazu Suzuoki, Osamu Takahashi, James D. Warnock, Stephen Weitzel, Dieter F. Wendel, Kazuaki Yazawa

IEEE J. Solid State Circuits, 2006

Debug of the CELL Processor: Moving the Lab into Silicon.

Mack W. Riley, Nathan Chelstrom, Mike Genden, Shoji Sawamura

Proceedings of the 2006 IEEE International Test Conference, 2006

A Circuit for Reducing Large Transient Current Effects on Processor Power Grids.

Eskinder Hailu, David W. Boerstler, Kazuhiko Miki, Jieming Qi, Michael Wang, Mack W. Riley

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

Key features of the design methodology enabling a multi-core SoC implementation of a first-generation CELL processor.

Dac C. Pham, Hans-Werner Anderson, Erwin Behnen, Mark Bolliger, Sanjay Gupta, H. Peter Hofstee, Paul E. Harvey, Charles R. Johns, James A. Kahle, Atsushi Kameyama, John M. Keaty, Bob Le, Sang Lee, Tuyen V. Nguyen, John G. Petrovick, Mydung Pham, Juergen Pille, Stephen D. Posluszny, Mack W. Riley, Joseph Verock, James D. Warnock, Steve Weitzel, Dieter F. Wendel

Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2005

Testability features of the first-generation CELL processor.

Mack W. Riley, Louis B. Bushard, Nathan Paul Chelstrom, Naoki Kiryu, Steven Ross Ferguson

Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

The design methodology and implementation of a first-generation CELL processor: a multi-core SoC.

Dac C. Pham, Erwin Behnen, Mark Bolliger, H. Peter Hofstee, Charles R. Johns, James A. Kahle, Atsushi Kameyama, John M. Keaty, Bob Le, Yoshio Masubuchi, Stephen D. Posluszny, Mack W. Riley, Masakazu Suzuoki, Michael Wang, James D. Warnock, Steve Weitzel, Dieter F. Wendel, Kazuaki Yazawa

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005