Jinbei Fang

According to our database, Jinbei Fang authored at least 6 papers between 2021 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

An Emerging NVM CIM Accelerator With Shared-Path Transpose Read and Bit-Interleaving Weight Storage for Efficient On-Chip Training in Edge Devices.

Zhiwang Guo, Deyang Chen, Chenyang Zhao, Jinbei Fang, Jingwen Jiang, Yixuan Liu, Haidong Tian, Xiankui Xiong, Keji Zhou, Xiaoyong Xue, Qi Liu, Xiaoyang Zeng

IEEE Trans. Circuits Syst. II Express Briefs, July, 2023

ARBiS: A Hardware-Efficient SRAM CIM CNN Accelerator With Cyclic-Shift Weight Duplication and Parasitic-Capacitance Charge Sharing for AI Edge Application.

Chenyang Zhao, Jinbei Fang, Jingwen Jiang, Xiaoyong Xue, Xiaoyang Zeng

IEEE Trans. Circuits Syst. I Regul. Pap., January, 2023

A 1T2R1C ReRAM CIM Accelerator With Energy-Efficient Voltage Division and Capacitive Coupling for CNN Acceleration in AI Edge Applications.

Deyang Chen, Zhiwang Guo, Jinbei Fang, Chenyang Zhao, Jingwen Jiang, Keji Zhou, Haidong Tian, Xiankui Xiong, Xiaoyong Xue, Xiaoyang Zeng

IEEE Trans. Circuits Syst. II Express Briefs, 2023

2022

A 2D2R ReRAM CIM accelerator for multilayer perceptron in visual classification applications.

Keji Zhou, Ruijun Lin, Zhiwang Guo, Yixuan Liu, Jingwen Jiang, Chenyang Zhao, Jinbei Fang, Xiaoxin Xu, Xiaoyong Xue, Xiaoyang Zeng

Microelectron. J., 2022

2021

An Energy Efficient Computing-in-Memory Accelerator With 1T2R Cell and Fully Analog Processing for Edge AI Applications.

Keji Zhou, Chenyang Zhao, Jinbei Fang, Jingwen Jiang, Deyang Chen, Yujie Huang, Ming-e Jing, Jun Han, Haidong Tian, Xiankui Xiong, Qi Liu, Xiaoyong Xue, Xiaoyang Zeng

IEEE Trans. Circuits Syst. II Express Briefs, 2021

Intra-array Non-Idealities Modeling and Algorithm Optimization for RRAM-based Computing-in-Memory Applications.

Chenyang Zhao, Jinbei Fang, Jingwen Jiang, Zhiwang Guo, Xiaoyong Xue, Xiaoyang Zeng

Proceedings of the 14th IEEE International Conference on ASIC, 2021