Haidong Tian

According to our database, Haidong Tian authored at least 4 papers between 2021 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

An Emerging NVM CIM Accelerator With Shared-Path Transpose Read and Bit-Interleaving Weight Storage for Efficient On-Chip Training in Edge Devices.

Zhiwang Guo, Deyang Chen, Chenyang Zhao, Jinbei Fang, Jingwen Jiang, Yixuan Liu, Haidong Tian, Xiankui Xiong, Keji Zhou, Xiaoyong Xue, Qi Liu, Xiaoyang Zeng

IEEE Trans. Circuits Syst. II Express Briefs, July, 2023

A 1T2R1C ReRAM CIM Accelerator With Energy-Efficient Voltage Division and Capacitive Coupling for CNN Acceleration in AI Edge Applications.

Deyang Chen, Zhiwang Guo, Jinbei Fang, Chenyang Zhao, Jingwen Jiang, Keji Zhou, Haidong Tian, Xiankui Xiong, Xiaoyong Xue, Xiaoyang Zeng

IEEE Trans. Circuits Syst. II Express Briefs, 2023

2021

An Energy Efficient Computing-in-Memory Accelerator With 1T2R Cell and Fully Analog Processing for Edge AI Applications.

Keji Zhou, Chenyang Zhao, Jinbei Fang, Jingwen Jiang, Deyang Chen, Yujie Huang, Ming-e Jing, Jun Han, Haidong Tian, Xiankui Xiong, Qi Liu, Xiaoyong Xue, Xiaoyang Zeng

IEEE Trans. Circuits Syst. II Express Briefs, 2021

A Semi-Floating Gate Transistors In-Memory Computing design with 40.14 TOPS/W for matrix-multiplication with frequently updated weight.

Yukai Lin, Yu Wang, Xianwu Hu, Jiayun Feng, Gan Wen, Xiankui Xiong, Haidong Tian, Yufeng Xie

Proceedings of the 14th IEEE International Conference on ASIC, 2021