Bonan Yan
Orcid: 0000-0002-3052-9330
According to our database1,
Bonan Yan
authored at least 40 papers
between 2015 and 2024.
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Bibliography
2024
DDC-PIM: Efficient Algorithm/Architecture Co-Design for Doubling Data Capacity of SRAM-Based Processing-in-Memory.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., March, 2024
Probabilistic Compute-in-Memory Design for Efficient Markov Chain Monte Carlo Sampling.
IEEE Trans. Circuits Syst. I Regul. Pap., February, 2024
AttentionLego: An Open-Source Building Block For Spatially-Scalable Large Language Model Accelerator With Processing-In-Memory Technology.
CoRR, 2024
2023
Sci. China Inf. Sci., October, 2023
Hadamard product-based in-memory computing design for floating point neural network training.
Neuromorph. Comput. Eng., March, 2023
SRAM-Based Processing-In-Memory Design with Kullback-Leibler Divergence-Based Dynamic Precision Quantization.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
Accelerating Neural-ODE Inference on FPGAs with Two-Stage Structured Pruning and History-based Stepsize Search.
Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023
2022
VSDCA: A Voltage Sensing Differential Column Architecture Based on 1T2R RRAM Array for Computing-in-Memory Accelerators.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
Neuromorph. Comput. Eng., 2022
A 1.041-Mb/mm<sup>2</sup> 27.38-TOPS/W Signed-INT8 Dynamic-Logic-Based ADC-less SRAM Compute-in-Memory Macro in 28nm with Reconfigurable Bitwise Operation for AI and Embedded Applications.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
ASTERS: adaptable threshold spike-timing neuromorphic design with twin-column ReRAM synapses.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
Heterogeneous Memory Architecture Accommodating Processing-in-Memory on SoC for AIoT Applications.
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022
2020
PhD thesis, 2020
ReTransformer: ReRAM-based Processing-in-Memory Architecture for Transformer Acceleration.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
Lattice: An ADC/DAC-less ReRAM-based Processing-In-Memory Architecture for Accelerating Deep Convolution Neural Networks.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
2019
Resistive Memory-Based In-Memory Computing: From Device and Large-Scale Integration System Perspectives.
Adv. Intell. Syst., 2019
Proceedings of the IEEE International Test Conference, 2019
An Overview of In-memory Processing with Emerging Non-volatile Memory for Data-intensive Applications.
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019
2018
Sci. China Inf. Sci., 2018
Exploring the opportunity of implementing neuromorphic computing systems with spintronic devices.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Proceedings of the 55th Annual Design Automation Conference, 2018
2017
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017
A closed-loop design to enhance weight stability of memristor based neural network chips.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
2016
Proceedings of the 18th System Level Interconnect Prediction Workshop, 2016
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
2015
Proceedings of the 2015 IFIP/IEEE International Conference on Very Large Scale Integration, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 52nd Annual Design Automation Conference, 2015
Proceedings of the 2015 IEEE Symposium on Computational Intelligence for Security and Defense Applications, 2015
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015