Jinhui Cheng
Orcid: 0009-0004-9553-0887
According to our database1,
Jinhui Cheng authored at least 7 papers
between 2022 and 2026.
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Bibliography
2026
A scalable 1L2D multi-core near-DRAM computing architecture leveraging 3D hybrid bonding for high-performance data-intensive applications.
Microelectron. J., 2026
A Scalable 1L2D Multi-Core Near-DRAM Computing Accelerator Based on 3D Hybrid Bonding for AI Models.
IEICE Trans. Electron., 2026
A 1.2GHz 12.77GB/s/mm<sup>2</sup> 3D Two-DRAM-One-Logic Process-Near-Memory Chip for Edge LLM Applications.
Proceedings of the IEEE International Solid-State Circuits Conference, 2026
2024
A stimulus identification method for high-resolution ADC linearity testing using low-precision ramp signals.
IEICE Electron. Express, 2024
Advanced Integration-Inspired Process-in-Memory: A Comprehensive Review of Design, Challenges, and Future Prospects.
IEEE Access, 2024
2023
A Hf0.5Zr0.5O2 ferroelectric capacitor-based half-destructive read scheme for computing-in-memory.
Sci. China Inf. Sci., May, 2023
2022
A 0.02% Accuracy Loss Voltage-Mode Parallel Sensing Scheme for RRAM-Based XNOR-Net Application.
IEEE Trans. Circuits Syst. II Express Briefs, 2022