Jinmei Lai

According to our database, Jinmei Lai authored at least 75 papers between 2003 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

Shrink eFPGA tile area by using custom cells and optimizing routing congestion.

Yanze Li, Jian Wang, Jinmei Lai

Microelectron. J., 2025

An Efficient Traversal Method for FPGA Interconnect Testing Based on Regular Routing.

Wenwei Chen, Lin Ye, XiaoTong Zhao, Tongshu Ding, Jian Wang, Jinmei Lai

Proceedings of the 2025 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2025

2024

A Reliable and Efficient Online Solution for Adaptive Voltage and Frequency Scaling on FPGAs.

Wei Xiong, Jiacheng Cao, Yaozhang Liu, Jian Wang, Jinmei Lai, Miaoqing Huang

IEEE Trans. Very Large Scale Integr. Syst., June, 2024

An optimized EEGNet processor for low-power and real-time EEG classification in wearable brain-computer interfaces.

Jiacheng Cao, Wei Xiong, Jie Lu, Peilin Chen, Jian Wang, Jinmei Lai, Miaoqing Huang

Microelectron. J., 2024

Testing Method for Embedded UltraRAM in Field Programmable Gate Arrays.

Jiaqi Guo, Wei Xiong, Jian Wang, Jinmei Lai

Proceedings of the 33rd IEEE Asian Test Symposium, 2024

2023

EdgeMedNet: Lightweight and Accurate U-Net for Implementing Efficient Medical Image Segmentation on Edge Devices.

Qingliang Liu, Shuai Zhou, Jinmei Lai

IEEE Trans. Circuits Syst. II Express Briefs, December, 2023

Optimizing Wirelength And Delay of FPGA Tile through Floorplanning Based on Simulated Annealing Algorithm.

Honghong Long, Yu Bai, Yanze Li, Jian Wang, Jinmei Lai

Proceedings of the 15th IEEE International Conference on ASIC, 2023

An Accurate Area Model for FPGA Circuits at Advanced Technologies.

Yanze Li, Zeyu Sun, Jianfan Zhang, Zhichao Wei, Jian Wang, Jinmei Lai

Proceedings of the 15th IEEE International Conference on ASIC, 2023

A High-Performance YOLOV5 Accelerator for Object Detection with Near Sensor Intelligence.

Jiacheng Cao, Ziyi Yang, Jie Lu, Jinmei Lai

Proceedings of the 15th IEEE International Conference on ASIC, 2023

2022

An Efficient Channel-Aware Sparse Binarized Neural Networks Inference Accelerator.

Qingliang Liu, Jinmei Lai, Jiabao Gao

IEEE Trans. Circuits Syst. II Express Briefs, 2022

3-D Auxiliary Classifier GAN for Hyperspectral Anomaly Detection via Weakly Supervised Learning.

Huanlin Luo, Haowen Zhu, Shengyang Liu, Yichuan Liu, Xinzhong Zhu, Jinmei Lai

IEEE Geosci. Remote. Sens. Lett., 2022

AutoTEA: An Automated Transistor-level Efficient and Accurate design tool for FPGA design.

Yanze Li, Yufan Zhang, Jiafeng Liu, Jun Gong, Jian Wang, Jinmei Lai, Xinxuan Tao, Gang Qu

Integr., 2022

An Effective Test Method for Block RAMs in Heterogeneous FPGAs Based on a Novel Partial Bitstream Relocation Technique.

Wei Xiong, Yanze Li, Changpeng Sun, Huanlin Luo, Jiafeng Liu, Jian Wang, Jinmei Lai, Gang Qu

Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

2021

HBDCA: A Toolchain for High-Accuracy BRAM-Defined CNN Accelerator on FPGA with Flexible Structure.

Zhengjie Li, Jiabao Gao, Jinmei Lai

IEICE Trans. Inf. Syst., 2021

FCA-BNN: Flexible and Configurable Accelerator for Binarized Neural Networks on FPGA.

Jiabao Gao, Yuchen Yao, Zhengjie Li, Jinmei Lai

IEICE Trans. Inf. Syst., 2021

TCP-Net: Minimizing Operation Counts of Binarized Neural Network Inference.

Qingliang Liu, Jiabao Gao, Jinmei Lai

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

AutoTEA: Automated Transistor-level Efficient and Accurate Optimization for GRM FPGA Design.

Yanze Li, Yufan Zhang, Jiafeng Liu, Jian Wang, Jinmei Lai, Gang Qu

Proceedings of the 29th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2021

2020

FABLE-DTS: Hardware-Software Co-Design of a Fast and Stable Data Transmission System for FPGAs.

Jia-Bao Gao, Jian Wang, Md Tanvir Arafin, Jin-Mei Lai

Proceedings of the 33rd IEEE International System-on-Chip Conference, 2020

A Tile-based Interconnect Model for FPGA Architecture Exploration.

Chengyu Hu, Qinghua Duan, Peng Lu, Wei Liu, Jian Wang, Jinmei Lai

Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

FPTLOPT: An Automatic Transistor-Level Optimization Tool for GRM FPGA.

Yufan Zhang, Zhengjie Li, Jian Wang, Jinmei Lai

Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

INTB: A New FPGA Interconnect Model for Architecture Exploration.

Chengyu Hu, Qinghua Duan, Peng Lu, Wei Liu, Jian Wang, Jinmei Lai

Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

HRAE: Hardware-assisted Randomization against Adversarial Example Attacks.

Jiliang Zhang, Shuang Peng, Yupeng Hu, Fei Peng, Wei Hu, Jinmei Lai, Jing Ye, Xiangqi Wang

Proceedings of the 29th IEEE Asian Test Symposium, 2020

2019

An Automatic Transistor-Level Tool for GRM FPGA Interconnect Circuits Optimization.

Zhengjie Li, Yuanlong Xiao, Yufan Zhang, Yunbing Pang, Chengyu Hu, Jian Wang, Jinmei Lai

Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

An Analytical-based Hybrid Algorithm for FPGA Placement.

Chengyu Hu, Qinghua Duan, Liran Hu, Peng Lu, Zhengjie Li, Meng Yang, Jian Wang, Jinmei Lai

Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

Transistor-Level Optimization Methodology for GRM FPGA Interconnect Circuits.

Zhengjie Li, Yuanlong Xiao, Yufan Zhang, Yunbing Pang, Jian Wang, Jinmei Lai

Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

Design and implementation of Serial ATA pbysical layer on FPGA.

Xie Xie, Qinghua Duan, Jiafeng Liu, Jian Wang, Jinmei Lai

Proceedings of the 13th IEEE International Conference on ASIC, 2019

Research on Area Modeling Methodology for FPGA Interconnect Circuits.

Yunbing Pang, Jiqing Xu, Zhiyin Lu, Zhengjie Li, Yufan Zhang, Jinmei Lai

Proceedings of the 13th IEEE International Conference on ASIC, 2019

An FPGA-based log-structure Flash memory system for space exploration.

Huanlin Luo, Yunbo Liu, Hai Ren, Tiantian Zhang, Jian Wang, Jinmei Lai

Proceedings of the 13th IEEE International Conference on ASIC, 2019

A Low-delay Configurable Register for FPGA.

Zhi-Yin Lu, Jia-Feng Liu, Yunbing Pang, Zhengjie Li, Yufan Zhang, Jin-Mei Lai, Jian Wang

Proceedings of the 13th IEEE International Conference on ASIC, 2019

An Exponential Dynamic Weighted Fair Queuing Algorithm for Task Scheduling in Chip Verification Platform.

Jiafeng Liu, Zhiyin Lu, Xie Xie, Jian Wang, Jinmei Lai

Proceedings of the 13th IEEE International Conference on ASIC, 2019

Balance of memory footprint and runtime for high-density routing in large-scale FPGAs.

Wei Liu, Weilin Cong, Chengyu Hu, Peng Lu, Jinmei Lai

Proceedings of the 13th IEEE International Conference on ASIC, 2019

A Web-based Waveform Viewer for BR0101 Chip Testing Platform.

Xinyu He, Xie Xie, Jinmei Lai, Jian Wang

Proceedings of the 13th IEEE International Conference on ASIC, 2019

A Polymorphic Circuit Interoperability Framework.

Timothy Dunlap, Gang Qu, Jinmei Lai

Proceedings of the 13th IEEE International Conference on ASIC, 2019

2018

Design of a power efficient self-adaptive LVDS driver.

Hanyang Xu, Jian Wang, Jinmei Lai

IEICE Electron. Express, 2018

A SA-based parallel method for FPGA placement.

Chengyu Hu, Peng Lu, Meng Yang, Jian Wang, Jinmei Lai

IEICE Electron. Express, 2018

2017

FPGA-based convolution neural network for traffic sign recognition.

Yuchen Yao, Zhiqian Zhang, Zhen Yang, Jian Wang, Jinmei Lai

Proceedings of the 12th IEEE International Conference on ASIC, 2017

A deep research on the chip verification platform based on network.

Chuanliang Kang, Pei Yang, Jian Wang, Jinmei Lai

Proceedings of the 12th IEEE International Conference on ASIC, 2017

Remote embedded simulation system for SW/HW co-design based on dynamic partial reconfiguration.

Jiaqi Gu, Ruoyao Wang, Jian Wang, Jinmei Lai, Qinghua Duan

Proceedings of the 12th IEEE International Conference on ASIC, 2017

2016

Prototyping design of a flexible DSP block with pipeline structure for FPGA.

Hanyang Xu, Jian Wang, Jinmei Lai

IEICE Electron. Express, 2016

A universal automatic on-chip measurement of FPGA's internal setup and hold times.

Yuanlong Xiao, Jian Wang, Jinmei Lai

IEICE Electron. Express, 2016

Testing FPGA Local Interconnects Based on Repeatable Configuration Modules (Abstract Only).

Zhen Yang, Jian Wang, Meng Yang, Jinmei Lai

Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016

2015

A new automatic method for testing interconnect resources in FPGAs based on general routing matrix.

Zhen Yang, Chuanzeng Liang, Jian Wang, Jinmei Lai

IEICE Electron. Express, 2015

A power efficient current-mode differential driver for FPGAs.

Yuanlong Xiao, Jian Wang, Jinmei Lai

Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

Iterative optimization algorithm for sound localization.

Fang Sun, Jin-Mei Lai

Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

FPGA bitstream compression and decompression based on LZ77 algorithm and BMC technique.

Yuanpei Gao, Haijiang Ye, Jian Wang, Jinmei Lai

Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2014

An Architecture Independent Packing Method for LUT-based Commercial FPGA.

Meng Yang, Jinmei Lai, A. E. A. Almaini

J. Comput., 2014

Novel FPGA clock network with low latency and skew (abstract only).

Lei Li, Jian Wang, Jinmei Lai

Proceedings of the 2014 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2014

2013

Optimisation of Mixed Polarity Reed-Muller Functions.

Meng Yang, Jinmei Lai

J. Softw., 2013

Optimisation of Fixed Polarity Canonical Or-Coincidence Expansions.

Meng Yang, Jiarong Tong, Jinmei Lai

J. Comput., 2013

A hierarchical parallel evolvable hardware based on network on chip.

Jun Rong Wang, Dan Wang, Jin-Mei Lai

Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

A novel net-partition-based multithread FPGA routing method.

Chun Zhu, Jian Wang, Jinmei Lai

Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

Yet Another Many-Objective Clustering (YAMO-Pack) for FPGA CAD.

Meng Yang, Jinmei Lai, Jiarong Tong

Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

A novel multithread routing method for FPGAs (abstract only).

Chun Zhu, Qiuli Li, Jian Wang, Jinmei Lai

Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

FPGA bitstream compression and decompression using LZ and golomb coding (abstract only).

Jinsong Mao, Hao Zhou, Haijiang Ye, Jinmei Lai

Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

The timing control design of 65nm block RAM in FPGA.

Xinrui Zhang, Jian Wang, Dan Chen, Jinmei Lai, Lichun Bao, Xueling Liu

Proceedings of the IEEE 10th International Conference on ASIC, 2013

Improved unified interconnect unit for high speed and scalable FPGA.

Lei Li, Jian Wang, Jinmei Lai

Proceedings of the IEEE 10th International Conference on ASIC, 2013

Weight-based FPGA placement algorithm with wire effect considered.

Huagang Li, Jian Wang, Jinmei Lai

Proceedings of the IEEE 10th International Conference on ASIC, 2013

A high-resolution TDC implemented in a 90nm process FPGA.

Jinmei Lai, Yanquan Luo, Qi Shao, Lichun Bao, Xueling Liu

Proceedings of the IEEE 10th International Conference on ASIC, 2013

2012

A novel memristor-based rSRAM structure for multiple-bit upsets immunity.

Liyun Wang, Chun Zhang, Liguang Chen, Jinmei Lai, Jiarong Tong

IEICE Electron. Express, 2012

A novel full coverage test method for CLBs in FPGA (abstract only).

Yong Fu, Chi Wang, Liguang Chen, Jinmei Lai

Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012

2011

The design and verification of SEU-hardened configurable DFF.

Xinrui Zhang, Liguang Chen, Liyun Wang, Jian Wang, Jinmei Lai

Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

FPGA interconnect timing library based on the statistical method.

Xiangzhi Meng, Liguang Chen, Hao Zhou, Jian Wang, Meng Yang, Jinmei Lai

Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

A new configurable logic block with 4/5-input configurable LUT and fast/slow-path carry chain.

Zhidong Mao, Liguang Chen, Yuan Wang, Jinmei Lai

Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

Research on design method of scalable Configurable IP Core.

Lei Li, Jian Wang, Yuan Wang, Jinmei Lai

Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011

2009

A novel minloop SB design to improve FPGA routability.

JIanDe Yu, Jinmei Lai

Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009

A delay-optimized universal FPGA routing architecture.

Fang Wu, Huowen Zhang, Lei Duan, Jinmei Lai, Yuan Wang, Jiarong Tong

Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

A Flexible Bit-Stream Level Evolvable Hardware Platform Based on FPGA.

HuaQiu Yang, Liguang Chen, ShaoTeng Liu, HaiXiang Bu, Yuan Wang, Jinmei Lai

Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2009

2008

A high-performance reconfigurable VLSI architecture for vbsme in H.264.

Wei Cao, Hui Hou, Jiarong Tong, Jinmei Lai, Hao Min

IEEE Trans. Consumer Electron., 2008

High-speed and memory-efficient architecture for 2-D 1-Level discrete wavelet transform.

Hui Hou, Wei Cao, Fan-jiong Zhang, Jinmei Lai, Jiarong Tong

Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

A high-performance reconfigurable 2-D transform architecture for H.264.

Wei Cao, Hui Hou, Jinmei Lai, Jiarong Tong, Hao Min

Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

Design and implementation of the configuration circuit for FDP FPGA.

Yabin Wang, Jing Xie, Jinmei Lai, Jiarong Tong

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

A novel dynamic reconfigurable VLSI architecture for H.264 transforms.

Wei Cao, Hui Hou, Jinmei Lai, Jiarong Tong, Hao Min

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2005

Design of A 2.4-GHz integrated frequency synthesizer.

Fei Wang, Jianyu Zhang, Xuan Wang, Jinmei Lai, Chengshou Sun

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

A design of high speed double precision floating point adder using macro modules.

Chi Huang, Xinyu Wu, Jinmei Lai, Chengshou Sun, Gang Li

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2003

Periodic steady-state analysis of coupled ODE-AE-CGE systems for MOS RF autonomous circuit simulation.

Xinyu Wu, Zaiman Chen, Jinmei Lai, Qianling Zhang, Omar Wing, Junyan Ren

Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003