Junmo Lee
This page is a disambiguation page, it actually contains mutiple papers from persons of the same or a similar name.
Known people with the same name:
Bibliography
2025
Backside Active Power Delivery With Hybrid DC-DC Converter Enabled by Amorphous Oxide Semiconductor Transistors.
IEEE Trans. Very Large Scale Integr. Syst., August, 2025
3-D Digital Compute-in-Memory Benchmark With A5 CFET Technology: An Extension to Lookup-Table-Based Design.
IEEE Trans. Very Large Scale Integr. Syst., July, 2025
Optimization and Benchmarking of Monolithically Stackable Gain Cell Memory for Last-Level Cache.
CoRR, March, 2025
Revisiting Fake News Detection: Towards Temporality-aware Evaluation by Leveraging Engagement Earliness.
Proceedings of the Eighteenth ACM International Conference on Web Search and Data Mining, 2025
Machine Learning-Assisted Modeling of AC Stress-Induced Bias Temperature Instability in Oxide Channel Transistors for 2T Gain Cell eDRAM.
Proceedings of the IEEE International Reliability Physics Symposium, 2025
DataSentry: Building Missing Data Management System for In-the-Wild Mobile Sensor Data Collection through Multi-Year Iterative Design Approach.
Proceedings of the 2025 CHI Conference on Human Factors in Computing Systems, 2025
2024
NeuroSim V1.4: Extending Technology Support for Digital Compute-in-Memory Toward 1nm Node.
IEEE Trans. Circuits Syst. I Regul. Pap., April, 2024
Demonstration of On-Chip Switched-Capacitor DC-DC Converters using BEOL Compatible Oxide Power Transistors and Superlattice MIM Capacitors.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
Monolithic 3D Transposable 3T Embedded DRAM with Back-end-of-line Oxide Channel Transistor.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
Proceedings of the Forty-first International Conference on Machine Learning, 2024
Optimization of Backside of Silicon-Compatible High Voltage Superlattice Capacitor for 12V-to-6V On-Chip Voltage Conversion.
Proceedings of the Device Research Conference, 2024
Digital CIM with Noisy SRAM Bit: A Compact Clustered Annealer for Large-Scale Combinatorial Optimization.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2024
2023
Proceedings of the 32nd ACM International Conference on Information and Knowledge Management, 2023
Enabling Ultra-Low Power Ultrasound Imaging with Compute-in-Memory Sparse Reconstruction Accelerator.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2023
Optimization Strategies for Digital Compute-in-Memory from Comparative Analysis with Systolic Array.
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023
Proceedings of the Thirty-Seventh AAAI Conference on Artificial Intelligence, 2023
2022
IEEE ACM Trans. Audio Speech Lang. Process., 2022
2021
Novel Weight Update Scheme for Hardware Neural Network based on Synaptic Devices Having Abrupt LTP or LTD Characteristics.
CoRR, 2021
2020
VocGAN: A High-Fidelity Real-Time Vocoder with a Hierarchically-Nested Adversarial Network.
Proceedings of the 21st Annual Conference of the International Speech Communication Association, 2020
Speaking Speed Control of End-to-End Speech Synthesis Using Sentence-Level Conditioning.
Proceedings of the 21st Annual Conference of the International Speech Communication Association, 2020
2019
DNN based multi-speaker speech synthesis with temporal auxiliary speaker ID embedding.
Proceedings of the International Conference on Electronics, Information, and Communication, 2019