Kishore Kasichainula

According to our database¹, Kishore Kasichainula authored at least 6 papers between 2012 and 2024.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

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2024

Patch-based Selection and Refinement for Early Object Detection.

[BibT_eX]

[DOI]

Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, 2024

Transformer-Based Selective Super-resolution for Efficient Image Refinement.

[BibT_eX]

[DOI]

Proceedings of the Thirty-Eighth AAAI Conference on Artificial Intelligence, 2024

2023

Improving the Efficiency of CMOS Image Sensors through In-Sensor Selective Attention.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A Time-Memory-based CMOS Vision Sensor with In-Pixel Temporal Derivative Computing for Multi-Mode Image Processing.

[BibT_eX]

[DOI]

Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

3D-ISC: A 65nm 3D Compatible In-Sensor Computing Accelerator with Reconfigurable Tile Architecture for Real-Time DVS Data Compression.

[BibT_eX]

[DOI]

Gokul Krishnan

Gopikrishnan Raveendran Nair

Jonghyun Oh

Anupreetham Anupreetham

Pragnya Sudershan Nalla

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023

2012

A 40 nm CMOS analog front end with enhanced audio for HSPA/EDGE multimedia applications.

[BibT_eX]

[DOI]

Proceedings of the 38th European Solid-State Circuit conference, 2012

Kishore Kasichainula

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