Dong-Woo Jee

According to our database1, Dong-Woo Jee authored at least 21 papers between 2008 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.



In proceedings 
PhD thesis 




Design and Calibration Techniques for a Multichannel FPGA-Based Time-to-Digital Converter in an Object Positioning System.
IEEE Trans. Instrum. Meas., 2021

A 65nm 0.6-1.2V Low-Dropout Regulator Using Voltage-Difference-to-Time Converter With Direct Output Feedback.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

Current/Voltage Dual-Mode Single-Wire Simultaneous Bidirectional Interface Architecture for Sensor System.
IEEE Trans. Biomed. Circuits Syst., 2020

A 0.052 mm<sup>2</sup>, <0.4% THD, Sinusoidal Current Generator for Bio-Impedance Measurement Using a Recursive Digital Oscillator and Current-Domain FIR Filter.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

A DLL based clock multiplier using rotational DCDL and PRNG for spur reduction.
IEICE Electron. Express, 2019

Power-up control techniques for reliable SRAM PUF.
IEICE Electron. Express, 2019

Massive MIMO Systems With Low-Resolution ADCs: Baseband Energy Consumption vs. Symbol Detection Performance.
IEEE Access, 2019

A <25 μW CMOS monolithic photoplethysmographic sensor with distributed 1b delta-sigma light-to-digital convertor.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

A Multi(bio)sensor Acquisition System With Integrated Processor, Power Management, 8×8 LED Drivers, and Simultaneously Synchronized ECG, BIO-Z, GSR, and Two PPG Readouts.
IEEE J. Solid State Circuits, 2016

A Digitally Controlled Op-Amp with Level-Crossing-Based Approximation and its Application to a 10-bit Pipeline ADC.
J. Circuits Syst. Comput., 2016

28.4 A battery-powered efficient multi-sensor acquisition system with simultaneous ECG, BIO-Z, GSR, and PPG.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

Digitally Controlled Leakage-Based Oscillator and Fast Relocking MDLL for Ultra Low Power Sensor Platform.
IEEE J. Solid State Circuits, 2015

A 345 µW Multi-Sensor Biomedical SoC With Bio-Impedance, 3-Channel ECG, Motion Artifact Reduction, and Integrated DSP.
IEEE J. Solid State Circuits, 2015

18.3 A multi-parameter signal-acquisition SoC for connected personal health applications.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

A 13 µA Analog Signal Processing IC for Accurate Recognition of Multiple Intra-Cardiac Signals.
IEEE Trans. Biomed. Circuits Syst., 2013

A FIR-Embedded Phase Interpolator Based Noise Filtering for Wide-Bandwidth Fractional-N PLL.
IEEE J. Solid State Circuits, 2013

A 0.45V 423nW 3.2MHz multiplying DLL with leakage-based oscillator for ultra-low-power sensor platforms.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

A 1.9-GHz Fractional-N Digital PLL With Subexponent ΔΣ TDC and IIR-Based Noise Cancellation.
IEEE Trans. Circuits Syst. II Express Briefs, 2012

A 2 GHz Fractional-N Digital PLL with 1b Noise Shaping ΔΣ TDC.
IEEE J. Solid State Circuits, 2012

A 0.1-fref BW 1GHz fractional-N PLL with FIR-embedded phase-interpolator-based noise filtering.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

A low-voltage OP amp with digitally controlled algorithmic approximation.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008