José A. M. Nacif

Orcid: 0000-0003-0703-5620

According to our database1, José A. M. Nacif authored at least 99 papers between 2003 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Multimodal biometric authentication method by federated learning.
Biomed. Signal Process. Control., August, 2023

A survey on federated learning for security and privacy in healthcare applications.
Comput. Commun., July, 2023

VariBan: A Variable Bandwidth channel allocation algorithm for IEEE 802.15.4e-based networks.
Comput. Networks, July, 2023

Gene regulatory accelerators on cloud FPGA.
Concurr. Comput. Pract. Exp., 2023

Heterogeneous reconfigurable architectures for machine learning dataflows.
Concurr. Comput. Pract. Exp., 2023

Fast flow cloud: A stream dataflow framework for cloud FPGA accelerator overlays at runtime.
Concurr. Comput. Pract. Exp., 2023

A Software-Defined Wireless Network-Based System for Prioritizing Medical Alert Messages.
Proceedings of the XIII Brazilian Symposium on Computing Systems Engineering, 2023

RDSF: Everything at Same Place All at Once - A Random Decision Single Forest.
Proceedings of the XIII Brazilian Symposium on Computing Systems Engineering, 2023

Exploring Nanomagnetic Logic with Bennett Clocking.
Proceedings of the 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2023

A Non-Blocking Multistage Interconnection using Regular Clock Schemes for QCA Circuits.
Proceedings of the 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2023

L-BANCS: A Multi-Phase Tile Design for Nanomagnetic Logic.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2023

2022
Three-Input NPN Class Gate Library for Atomic Silicon Quantum Dots.
IEEE Des. Test, 2022

Improving the attribute retrieval on ABAC using opportunistic caches for Fog-Based IoT Networks.
Comput. Networks, 2022

LORENA: Low memORy symmEtric-Key geNerAtion Method for Based on Group Cryptography Protocol Applied to the Internet of Healthcare Things.
IEEE Access, 2022

A Bi-directional Attribute Synchronization Mechanism for Access Control in IoT Environments.
Proceedings of the Mobile Computing, Applications, and Services, 2022

Function as a Service Offloaded to a SmartNIC.
Proceedings of the IEEE Latin-American Conference on Communications, 2022

An NML in-plane Wire Crossing Structure.
Proceedings of the 13th IEEE Latin America Symposium on Circuits and System, 2022

A polynomial time exact solution to the bit-aware register binding problem.
Proceedings of the CC '22: 31st ACM SIGPLAN International Conference on Compiler Construction, Seoul, South Korea, April 2, 2022

2021
A cooperative protocol for pervasive underwater acoustic networks.
Wirel. Networks, 2021

You Only Traverse Twice: A YOTT Placement, Routing, and Timing Approach for CGRAs.
ACM Trans. Embed. Comput. Syst., 2021

HAMBug: A Hybrid CPU-FPGA System to Detect Race Conditions.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

TRAVERSAL: A Fast and Adaptive Graph-Based Placement and Routing for CGRAs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

BlockColdChain: Vaccine Cold Chain Blockchain.
CoRR, 2021

A dynamic channel allocation protocol for medical environment.
Ann. des Télécommunications, 2021

Data Center TCP com Histerese em Switches P4.
Proceedings of the 39th Brazilian Symposium on Computer Networks and Distributed Systems, 2021

Sistema de Detecção de Intrusão Serverless em uma SmartNIC.
Proceedings of the 39th Brazilian Symposium on Computer Networks and Distributed Systems, 2021

Um Método para Extração e Refinamento de Políticas de Acesso baseado em Árvore de Decisão e Algoritmo Genético.
Proceedings of the 39th Brazilian Symposium on Computer Networks and Distributed Systems, 2021

An Open Source Custom K-means Generator for AWS Cloud FPGA Accelerators.
Proceedings of the XI Brazilian Symposium on Computing Systems Engineering, 2021

RESHAPE: A Run-Time Dataflow Hardware-Based Mapping for CGRA Overlays.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Is It Time to Include High-Level Synthesis Design in Digital System Education for Undergraduate Computer Engineers?
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

NMLib: A Nanomagnetic Logic Standard Cell Library.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Google Colab CAD4U: Hands-On Cloud Laboratories for Digital Design.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Application Layer Packet Classifier in Hardware.
Proceedings of the 17th IFIP/IEEE International Symposium on Integrated Network Management, 2021

Opportunistic Attribute Caching: Improving the Efficiency of ABAC in Fog-Based IoT Networks.
Proceedings of the ICC 2021, 2021

Personalizing Online Computer Engineering Resources and Labs for Digital, Embedded, and Computer System Courses.
Proceedings of the IEEE Frontiers in Education Conference, 2021

2020
BloomTime: space-efficient stateful tracking of time-dependent network performance metrics.
Telecommun. Syst., 2020

On the impact of the synchronization constraint and interconnections in quantum-dot cellular automata.
Microprocess. Microsystems, 2020

Sistema de processamento de pacotes Serverless.
Proceedings of the XXXVIII Brazilian Symposium on Computer Networks and Distributed Systems, 2020

Mind the Gap: Bridging Verilog and Computer Architecture.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A Design Exploration of Scalable Mesh-based Fully Pipelined Accelerators.
Proceedings of the International Conference on Field-Programmable Technology, 2020

GA-lapagos, an open-source c framework including a python-based system for data analysis.
Proceedings of the GECCO '20: Genetic and Evolutionary Computation Conference, 2020

2019
DOCTraMS: A Decentralized and Offline Community-Based Traffic Monitoring System.
IEEE Trans. Intell. Transp. Syst., 2019

READY: A Fine-Grained Multithreading Overlay Framework for Modern CPU-FPGA Dataflow Applications.
ACM Trans. Embed. Comput. Syst., 2019

JetsonLEAP: A framework to measure power on a heterogeneous system-on-a-chip device.
Sci. Comput. Program., 2019

The internet of light: Impact of colors in LED-to-LED visible light communication systems.
Internet Technol. Lett., 2019

Cryptographic Algorithms in Wearable Communications: An Empirical Analysis.
IEEE Commun. Lett., 2019

Special issue with selected papers from 2017 Brazilian Symposium on Computer Engineering (SBESC 2017).
Des. Autom. Embed. Syst., 2019

ADD: Accelerator Design and Deploy - A tool for FPGA high-performance dataflow computing.
Concurr. Comput. Pract. Exp., 2019

Water ping: ICMP for the internet of underwater things.
Comput. Networks, 2019

Um Sistema Multinível de Distribuição de Identidades em Névoas Computacionais.
Proceedings of the XXXVII Brazilian Symposium on Computer Networks and Distributed Systems, 2019

Toward nanometric scale integration: an automatic routing approach for NML circuits.
Proceedings of the 32nd Symposium on Integrated Circuits and Systems Design, 2019

Ropper: a placement and routing framework for field-coupled nanotechnologies.
Proceedings of the 32nd Symposium on Integrated Circuits and Systems Design, 2019

2018
Autonomous Wireless Lake Monitoring.
Comput. Sci. Eng., 2018

A GPU/FPGA-Based K-Means Clustering Using a Parameterized Code Generator.
Proceedings of the Symposium on High Performance Computing Systems, 2018

Roteador SDN em hardware independente de protocolo com análise, casamento e ações dinâmicas.
Proceedings of the XXXVI Brazilian Symposium on Computer Networks and Distributed Systems, 2018

ProCoopa: um Protocolo Cooperativo para Redes de Sensores sem fio Aquáticas.
Proceedings of the XXXVI Brazilian Symposium on Computer Networks and Distributed Systems, 2018

Minimum Switching Networks.
Proceedings of the VIII Brazilian Symposium on Computing Systems Engineering, 2018

BANCS: Bidirectional Alternating Nanomagnetic Clocking Scheme.
Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018

From Java to FPGA: An Experience with the Intel HARP System.
Proceedings of the 30th International Symposium on Computer Architecture and High Performance Computing, 2018

Simplifying HW/SW integration to deploy multiple accelerators for CPU-FPGA heterogeneous platforms.
Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018

Lessons learned on which applications benefit when implemented on CPU-FPGA heterogeneous system.
Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018

COPPER: Increasing Underwater Sensor Network Performance Through Nodes Cooperation.
Proceedings of the 2018 IEEE Symposium on Computers and Communications, 2018

A Novel Five-input Multiple-function QCA Threshold Gate.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Placement and Routing by Overlapping and Merging QCA Gates.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Exploration of the Synchronization Constraint in Quantum-dot Cellular Automata.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

2017
A Dynamic Channel Allocation Protocol for Medical Environment under Multiple Base Stations.
Proceedings of the 2017 IEEE Wireless Communications and Networking Conference, 2017

Pingo d'á gua: ICMP para Internet das Coisas Aquá ticas.
Proceedings of the XXXV Brazilian Symposium on Computer Networks and Distributed Systems, 2017

Um Protocolo de Alocação Dinâmica de Canais para Ambientes Médicos sob Múltiplas Estações Base.
Proceedings of the XXXV Brazilian Symposium on Computer Networks and Distributed Systems, 2017

Exploring the dynamics of large-scale gene regulatory networks using hardware acceleration on a heterogeneous CPU-FPGA platform.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2017

Designing a collision detection accelerator on a heterogeneous CPU-FPGA platform.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2017

Mapping critical illness early signs to priority alert transmission on wireless networks.
Proceedings of the 9th IEEE Latin-American Conference on Communications, 2017

2016
Survey on the design of underwater sensor nodes.
Des. Autom. Embed. Syst., 2016

A Low-Cost Chlorophyll Fluorescence Sensor System.
Proceedings of the VI Brazilian Symposium on Computing Systems Engineering, 2016

A Placement and routing algorithm for Quantum-dot Cellular Automata.
Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

Hardware Modules for Packet Interarrival Time Monitoring for Software Defined Measurements.
Proceedings of the 41st IEEE Conference on Local Computer Networks, 2016

DOCS4V: Design and evaluation of a distributed and offline traffic monitoring system based on collaborative data.
Proceedings of the 19th IEEE International Conference on Intelligent Transportation Systems, 2016

2015
A Runtime FPGA Placement and Routing Using Low-Complexity Graph Traversal.
ACM Trans. Reconfigurable Technol. Syst., 2015

Increasing Observability in Post-Silicon Debug Using Asymmetric Omega Networks.
Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015

Vericonn: a tool to generate efficient interconnection networks for post-silicon debug.
Proceedings of the 16th Latin-American Test Symposium, 2015

Be a simulator developer and go beyond in computing engineering.
Proceedings of the 2015 IEEE Frontiers in Education Conference, 2015

2014
A Quantum-Dot Cellular Automata Processor Design.
Proceedings of the 27th Symposium on Integrated Circuits and Systems Design, 2014

2013
An efficient FPGA implementation in quantum-dot cellular automata.
Proceedings of the 26th Symposium on Integrated Circuits and Systems Design, 2013

Pollution and whitewashing attacks in a P2P live streaming system: Analysis and counter-attack.
Proceedings of IEEE International Conference on Communications, 2013

A run-time graph-based Polynomial Placement and routing algorithm for virtual FPGAS.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

2012
Selection of formal verification heuristics for parallel execution.
Int. J. Softw. Tools Technol. Transf., 2012

Characterizing SopCast client behavior.
Comput. Commun., 2012

HydroNode: an underwater sensor node prototype for monitoring hydroelectric reservoirs.
Proceedings of the Conference on Under Water Networks, 2012

HydroNode: A low cost, energy efficient, multi purpose node for underwater sensor networks.
Proceedings of the 37th Annual IEEE Conference on Local Computer Networks, 2012

2011
Uma metodologia para identificação de módulos de circuitos integrados propensos a erros.
PhD thesis, 2011

A cache based algorithm to predict HDL modules faults.
Proceedings of the 12th Latin American Test Workshop, 2011

Tracking hardware evolution.
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

2009
BugTracer: A system for integrated circuit development tracking and statistics retrieval.
Proceedings of the 10th Latin American Test Workshop, 2009

2008
Efficient Allocation of Verification Resources using Revision History Information.
Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008

2006
System-level Dynamic Power Management Techniques for Communication Intensive Devices.
Proceedings of the IFIP VLSI-SoC 2006, 2006

2004
Exception handling in microprocessors using assertion libraries.
Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, 2004

2003
The Chip is Ready. Am I done? On-chip Verification using Assertion Processors.
Proceedings of the IFIP VLSI-SoC 2003, 2003

On-Chip Property Verification Using Assertion Processors.
Proceedings of the VLSI-SOC: From Systems to Chips, 2003

Refactoring digital hardware designs with assertion libraries.
Proceedings of the Eighth IEEE International High-Level Design Validation and Test Workshop 2003, 2003

Efficient power management in real-time embedded systems.
Proceedings of 9th IEEE International Conference on Emerging Technologies and Factory Automation, 2003


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