Marc J. M. Heijligers

According to our database1, Marc J. M. Heijligers authored at least 15 papers between 1995 and 2009.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2009
Compositional, Dynamic Cache Management for Embedded Chip Multiprocessors.
J. Signal Process. Syst., 2009

2008
Xetal-II: A 107 GOPS, 600 mW Massively Parallel Processor for Video Scene Analysis.
IEEE J. Solid State Circuits, 2008

Compositional, dynamic cache management for embedded chip multiprocessors.
Proceedings of the Design, Automation and Test in Europe, 2008

2007
Static Cache Partitioning Robustness Analysis for Embedded On-Chip Multi-processors.
Trans. High Perform. Embed. Archit. Compil., 2007

XETAL-II: A 107 GOPS, 600mW Massively-Parallel Processor for Video Scene Analysis.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

An Embedded Low Power High Efficient Object Tracker for Surveillance Systems.
Proceedings of the 2007 First ACM/IEEE International Conference on Distributed Smart Cameras, 2007

2006
Throughput optimization via cache partitioning for embedded multiprocessors.
Proceedings of 2006 International Conference on Embedded Computer Systems: Architectures, 2006

Compositional, efficient caches for a chip multi-processor.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005
Compositional Memory Systems for Multimedia Communicating Tasks.
Proceedings of the 2005 Design, 2005

2004
Compositional Memory Systems for Data Intensive Applications.
Proceedings of the 2004 Design, 2004

A Scalable Architecture for LDPC Decodin.
Proceedings of the 2004 Design, 2004

2003
Statistical Power Estimation of Behavioral Descriptions.
Proceedings of the Integrated Circuit and System Design, 2003

2000
A code-motion pruning technique for global scheduling.
ACM Trans. Design Autom. Electr. Syst., 2000

1996
A Constructive Method for Exploiting Code Motion.
Proceedings of the 9th International Symposium on System Synthesis, 1996

1995
High-level synthesis scheduling and allocation using genetic algorithms.
Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29, 1995


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