Shubhendu Sinha

According to our database1, Shubhendu Sinha authored at least 7 papers between 2012 and 2017.

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Bibliography

2017
NoC-Based Multiprocessor Architecture for Mixed-Time-Criticality Applications.
Proceedings of the Handbook of Hardware/Software Codesign., 2017

2015
Composable and predictable dynamic loading for time-critical partitioned systems on multiprocessor architectures.
Microprocessors and Microsystems - Embedded Hardware Design, 2015

Run-time middleware to support real-time system scenarios.
Proceedings of the European Conference on Circuit Theory and Design, 2015

2014
Composable and Predictable Dynamic Loading for Time-Critical Partitioned Systems.
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

2013
Virtual execution platforms for mixed-time-criticality systems: the CompSOC architecture and design flow.
SIGBED Review, 2013

2012
Towards future adaptive multiprocessor systems-on-chip: An innovative approach for flexible architectures.
Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

Hardware / Software Virtualization for the Reconfigurable Multicore Platform.
Proceedings of the 15th IEEE International Conference on Computational Science and Engineering, 2012


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