Mehdi Dehbashi

According to our database1, Mehdi Dehbashi authored at least 18 papers between 2007 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
Constraint-Based Pattern Retargeting for Reducing Localized Power Activity During Testing.
Proceedings of the 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2018

2017
Machine learning based test pattern analysis for localizing critical power activity areas.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2017

2016
Automated Optimization of Scan Chain Structure for Test Compression-Based Designs.
Proceedings of the 25th IEEE Asian Test Symposium, 2016

2015
Transaction-based online debug for NoC-based multiprocessor SoCs.
Microprocess. Microsystems, 2015

2014
Debug Automation for Synchronization Bugs at RTL.
Proceedings of the 2014 27th International Conference on VLSI Design, 2014

Automated formal verification of X propagation with respect to testability issues.
Proceedings of the 9th International Design and Test Symposium, 2014

SAT-based speedpath debugging using X traces.
Proceedings of the 9th International Design and Test Symposium, 2014

Sat-based speedpath debugging using waveforms.
Proceedings of the 19th IEEE European Test Symposium, 2014

2013
Debug automation from pre-silicon to post-silicon.
PhD thesis, 2013

Automated design debugging in a testbench-based verification environment.
Microprocess. Microsystems, 2013

Debug Automation for Logic Circuits Under Timing Variations.
IEEE Des. Test, 2013

Efficient automated speedpath debugging.
Proceedings of the 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2013

2012
Functional analysis of circuits under timing variations.
Proceedings of the 17th IEEE European Test Symposium, 2012

On Modeling and Evaluation of Logic Circuits under Timing Variations.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

Automated debugging from pre-silicon to post-silicon.
Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012

Automated Post-Silicon Debugging of Failing Speedpaths.
Proceedings of the 21st IEEE Asian Test Symposium, 2012

2008
Fault Effects in FlexRay-Based Networks with Hybrid Topology.
Proceedings of the The Third International Conference on Availability, 2008

2007
Assessment of Message Missing Failures in FlexRay-Based Networks.
Proceedings of the 13th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC 2007), 2007


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