# John McAllister

According to our database

Collaborative distances:

^{1}, John McAllister authored at least 48 papers between 2004 and 2019.Collaborative distances:

## Timeline

#### Legend:

Book In proceedings Article PhD thesis Other## Links

#### On csauthors.net:

## Bibliography

2019

Comparison of Exponentially Decreasing Vs. Polynomially Decreasing Objective Functions for Making Quantum Circuits Nearest Neighbour Compliant.

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019

Window Size Estimation for Nearest Neighbour Compliant Quantum Circuit Mapping.

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

On Modified Squared Givens Rotations for Sphere Decoder Preprocessing.

Proceedings of the IEEE International Conference on Acoustics, 2019

EMG Wrist-hand Motion Recognition System for Real-time Embedded Platform.

Proceedings of the IEEE International Conference on Acoustics, 2019

2018

Architectural Synthesis of Multi-SIMD Dataflow Accelerators for FPGA.

IEEE Trans. Parallel Distrib. Syst., 2018

Emg Acquisition and Hand Pose Classification for Bionic Hands from Randomly-Placed Sensors.

Proceedings of the 2018 IEEE International Conference on Acoustics, 2018

2017

Multicore distributed dictionary learning: A microarray gene expression biclustering case study.

Proceedings of the 2017 IEEE International Conference on Acoustics, 2017

2016

Guest Editorial: New Frontiers in Signal Processing Applications and Embedded Processing Technologies.

Signal Processing Systems, 2016

Streaming Elements for FPGA Signal and Image Processing Accelerators.

IEEE Trans. VLSI Syst., 2016

Constructive Synthesis of Memory-Intensive Accelerators for FPGA From Nested Loop Kernels.

IEEE Trans. Signal Processing, 2016

2015

Guest Editorial: Special Issue on Embedded Computer Systems: Architectures, Modeling and Simulation.

International Journal of Parallel Programming, 2015

2014

FPGA-based Tabu search for detection in large-scale MIMO systems.

Proceedings of the 2014 IEEE Workshop on Signal Processing Systems, 2014

2013

FPGA-Based DSP.

Proceedings of the Handbook of Signal Processing Systems, 2013

Guest Editorial: Special Issue on 2011 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XI).

International Journal of Parallel Programming, 2013

Soft-core stream processor for sliding window applications.

Proceedings of the IEEE Workshop on Signal Processing Systems, 2013

Soft-core stream processing on FPGA: An FFT case study.

Proceedings of the IEEE International Conference on Acoustics, 2013

High performance real-time Pre-Processing for Fixed-Complexity Sphere Decoder.

Proceedings of the IEEE Global Conference on Signal and Information Processing, 2013

Software defined FFT architecture for IEEE 802.11ac.

Proceedings of the IEEE Global Conference on Signal and Information Processing, 2013

Targeting FPGA DSP Slices for a Large Integer Multiplier for Integer Based FHE.

Proceedings of the Financial Cryptography and Data Security, 2013

Bounded selective spanning with extended fast enumeration for MIMO-OFDM systems detection.

Proceedings of the 21st European Signal Processing Conference, 2013

2012

Software-Defined Sphere Decoding for FPGA-Based MIMO Detection.

IEEE Trans. Signal Processing, 2012

Automatic FPGA synthesis of memory intensive C-based kernels.

Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

Preface.

Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

Valved dataflow for FPGA memory hierarchy synthesis.

Proceedings of the 2012 IEEE International Conference on Acoustics, 2012

Memory-centric VDF graph transformations for practical FPGA implementation.

Proceedings of the IEEE 10th Symposium on Embedded Systems for Real-time Multimedia, 2012

2011

Real-Valued Fixed-Complexity Sphere Decoder for High Dimensional QAM-MIMO Systems.

IEEE Trans. Signal Processing, 2011

QR Decomposition-Based Matrix Inversion for High Performance Embedded MIMO Receivers.

IEEE Trans. Signal Processing, 2011

A kernel interleaved scheduling method for streaming applications on soft-core vector processors.

Proceedings of the 2011 International Conference on Embedded Computer Systems: Architectures, 2011

A Pipeline Interleaved Heterogeneous SIMD Soft Processor Array Architecture for MIMO-OFDM Detection.

Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2011

2010

FPGA based soft-core SIMD processing: A MIMO-OFDM Fixed-Complexity Sphere Decoder case study.

Proceedings of the International Conference on Field-Programmable Technology, 2010

FPGA-based DSP.

Proceedings of the Handbook of Signal Processing Systems, 2010

2009

Evolutionary requirements for next-generation dataflow-based FPGA system design.

Proceedings of the 17th European Signal Processing Conference, 2009

2008

Power efficient dynamic-range utilisation for DSP on FPGA.

Proceedings of the IEEE Workshop on Signal Processing Systems, 2008

Reduced-complexity MSGR-based matrix inversion.

Proceedings of the IEEE Workshop on Signal Processing Systems, 2008

Introduction to System Level Design for Heterogeneous Systems.

Proceedings of the Embedded Computer Systems: Architectures, 2008

Memory-Centric Hardware Synthesis from Dataflow Models.

Proceedings of the Embedded Computer Systems: Architectures, 2008

Modified givens rotations and their application to matrix inversion.

Proceedings of the IEEE International Conference on Acoustics, 2008

Power efficient DSP datapath configuration methodology for FPGA.

Proceedings of the FPL 2008, 2008

2007

Design Methodology for Real-Time FPGA-Based Sound Synthesis.

IEEE Trans. Signal Processing, 2007

Rapid implementation and optimisation of DSP systems on FPGA-centric heterogeneous platforms.

Journal of Systems Architecture, 2007

SOC Memory Hierarchy Derivation from Dataflow Graphs.

Proceedings of the IEEE Workshop on Signal Processing Systems, 2007

2006

Multidimensional DSP Core Synthesis for FPGA.

VLSI Signal Processing, 2006

Muir Hardware Synthesis for Multimedia Applications.

Proceedings of the 2006 4th Workshop on Embedded Systems for Real-Time Multimedia, 2006

2005

Rapid Implementation and Optimisation of DSP Systems on SoPC Heterogeneous Platforms.

Proceedings of the Embedded Computer Systems: Architectures, 2005

Rapid generation of hardware functionality in heterogeneous platforms [FPGA implementation applications].

Proceedings of the 2005 IEEE International Conference on Acoustics, 2005

FPGA Core Network Implementation and Optimization: A Case Study.

Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology, 2005

Core-Based Methodology: An Automated Approach for Implementing a Complete System from Algorithms to a Heterogeneous Network including FPGAs.

Proceedings of the 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 2005

2004

Embedded Context Aware Hardware Component Generation for Dataflow System Exploration.

Proceedings of the Computer Systems: Architectures, 2004